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rev. 1.0 9/14 copyright ? 2014 by silicon laboratories an332 an332 si47 xx p rogramming g uide 1. introduction this document provides an overview of the programming requirements for the si47 04/05/06/07/1x/2x/3x/4x/84/85 fm transmitter/am/fm/sw/lw/wb receiv er. the hardware control interface and software commands are detailed along with several examples of the required steps to configure the device for va rious modes of operation. 2. overview this family of products is progr ammed using commands and responses. to perform an action, the system controller writes a command byte and associated arguments, causing the devi ce to execute the given command. the device will, in tu rn, provide a response depending on the type of command that was sent. section "4. commands and responses" on page 6 and section "5. commands and properties" on page 7 describe the procedures for using commands and responses and prov ide complete lists of commands, properties, and responses. the device has a slave control interface that allows the system controller to send commands to and receive responses from the device using one of three serial protocols (or bus modes): 2-wire mode (i 2 c and smbus compatible), 3-wire mode, or spi mode. section "6. control interface" on page 206 describes the control interface in detail. section "7. powerup" on page 214 describes options for the sequencing of vdd and vio power supplies, selection of the desired bus mode, provision of the reference clock, rclk, and sending of the power_up command. section "8. powerdown" on page 221 describes sendi ng the power_down command and removing vdd and vio power supplies as necessary. section "9. digital audio interface" on page 222 describ es the digital audio format supported and how to operate the device in digital mode. section "10. timing" on page 225 describes the cts (clear to send) timing indicating when the command has been accepted and in most cases completed executi on, and the stc (seek/tune complete) timing indicating when the seek/tune commands have completed execution. section "11. fm transmitter" on page 231 describes the audio dynamic range control, limiter, pre-emphasis, recommendations for maximizing audio volume for the fm transmitter. section "12. programming examples" on page 235 pr ovides flowcharts and st ep-by-step procedures for programming the device.
an332 2 rev. 1.0 table 1. product family function part number general description fm transmitter fm receiver am receiver sw/lw receiver wb receiver rds high performance rds rps same digital input digital output embedded fm antenna aec-q100 qualified package size (mm) si4700 fm receiver ? 4x4 si4701 fm receiver with rds ?? 4x4 SI4702 fm receiver ? 3x3 si4703 fm receiver with rds ?? 3x3 si4704 fm receiver ?? 3x3 si4705 fm receiver with rds ?? 2 ?? 3x3 si4706 1 high performance rds receiver ????? 3x3 si4707 1 wb receiver with same ?? 3x3 si4708 fm receiver ? 2.5x2.5 si4709 fm receiver with rds ?? 2.5x2.5 si4710 fm transmitter ??? 3x3 si4711 fm transmitter with rds ???? 3x3 si4712 fm transmitter with rps ? ??? 3x3 si4713 fm transmitter with rds & rps ? ???? 3x3 si4720 fm transceiver ?? ??? 3x3 si4721 fm transceiver with rds ?? ? ? ??? 3x3 si4730 am/fm receiver ?? 3x3 si4731 am/fm receiver with rds ?? ? 2 ? 3x3 si4734 am/sw/lw/fm receiver ??? 3x3 si4735 am/sw/lw/fm receiver with rds ??? ? 2 ? 3x3 si4736 am/fm/wb receiver ?? ? 3x3 si4737 am/fm/wb receiver with rds ?? ?? ? 3x3 si4738 fm/wb receiver ?? 3x3 si4739 fm/wb receiver with rds ??? ? 3x3 si4740 1 am/fm receiver ?? ? 4x4 notes: 1. si4706, si4707, and si474x are covered under nda. 2. high performance rds is available in si4705/31/35/85-d50 and later.
an332 rev. 1.0 3 si4741 1 am/fm receiver with rds ?? ?? ? ? 4x4 si4742 1 am/lw/sw/fm/wb receiver ??? ? ? 4x4 si4743 1 am/lw/sw/fm/wb receiver with rds ??? ??? ? ? 4x4 si4744 1 am/lw/sw/fm receiver ??? ? 4x4 si4745 1 am/lw/sw/fm receiver with rds ??? ?? ? ? 4x4 si4749 1 high-performance rds receiver ?? ? 4x4 si4784 fm receiver ?? 3x3 si4785 fm receiver with rds ?? 2 ? 3x3 table 1. product family function (continued) notes: 1. si4706, si4707, and si474x are covered under nda. 2. high performance rds is available in si4705/31/35/85-d50 and later.
an332 4 rev. 1.0 t able of c ontents section page 1. introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 2. overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 3. terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 4. commands and responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 5. commands and propertie s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 5.1. commands and pr operties for the fm/rds transmitt er (si4710/11/12/13/20/21) . . .7 5.2. commands and properties for the fm/rds receiver (si4704/05/06/2x/3x/4x/84/85) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 5.3. commands and properties for the am/sw/lw receiver (si4730/31/34/35/36/37/ 40/41/42/43/44/45) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124 5.4. commands and pr operties for the wb receiver (si 4707/36/37/38/39/42/ 43) . . . . 172 6. control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206 6.1. 2-wire control interface mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206 6.2. 3-wire control interface mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209 6.3. spi control interface mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212 7. powerup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214 7.1. powerup from device memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 7.2. powerup from a component patch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216 8. powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221 9. digital audio interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .222 10. timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225 11. fm transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231 11.1. audio dynamic range control fo r fm transmitter . . . . . . . . . . . . . . . . . . . . . . . . 231 11.2. audio pre-emphasis for fm transmi tter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232 11.3. audio limiter for fm transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233 11.4. maximizing audio volume for fm transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . 233 12. programming examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235 12.1. programming example for the fm/rds transmitter . . . . . . . . . . . . . . . . . . . . . . 235 12.2. programming example for the fm/rds receiver . . . . . . . . . . . . . . . . . . . . . . . . 253 12.3. programming example for the am/lw/sw receiver . . . . . . . . . . . . . . . . . . . . . . 275 12.4. programming example for the wb/same receiver . . . . . . . . . . . . . . . . . . . . . . . 285 appendix a?comparison of the si4704/05/3x-b20, si4704/05/3x-c40, and si4704/ 05/3x-d60 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294 appendix b?si4704/05/3x-b2 0/-c40/-d60 compatibility checklist . . . . . . . . . . . . . . . . 298 document change list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 1 contact information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .302
an332 rev. 1.0 5 3. terminology ? sen ?serial enable pin, active low; used as device sele ct in 3-wire and spi operation and address selection in 2-wire operation. ? sdio?serial data in/data out pin. ? sclk?serial clock pin. ? rst or rstb?reset pin, active low ? rclk?external reference clock ? gpo?general purpose output ? cts?clear to send ? stc?seek/tune complete ? nvm?non-volatile internal device memory ? device?refers to the fm trans mitter/am/fm/sw/lw/wb receiver ? system controller?refers to the system microcontroller ? cmd?command byte ? commandn?command register (16-bit) in 3-wire mode (n = 1 to 4) ? argn?argument byte (n = 1 to 7) ? status?status byte ? respn?response byte (n = 1 to 15) ? responsen?response regist er (16-bit) in 3-wire mode (n = 1 to 8)
an332 6 rev. 1.0 4. commands and responses commands control actions, such as power up, power down , or tune to a frequency, and are one byte in size. arguments are specific to a given command and are us ed to modify the command. for example, after the tx_tune_freq command, arguments are required to set the tune frequency. arguments are one byte in size, and each command may require up to seven argument s. responses provide the system controller status information and are returned after a command and its associated arguments are issued. all commands return a one byte status indicating interrupt state and clear-to-send the next command. commands may return up to 15 additional response bytes. a complete list of comm ands is available in ?5. commands and properties?. table 2 shows an example of tuning to a frequency us ing the tx_tune_freq command. this command requires that a command and three arguments be sent and returns one status byte. the table is broken into three columns. the first column lists the action taking place: command (cmd), argument (arg), status (status), or response (resp). the second column lists the data byte or bytes in hexadecimal that are being sent or received. an arrow preceding the data indicates data being sent from the device to the system controller. the third column describes the action. properties are special command arguments used to modi fy the default device operation and are generally configured immediately after power-up. examples of properties are tx _preemphasis and refclk_freq. a complete list of properties is available in section ?5. commands and properties?. table 3 shows an example of setting the refclk frequency using the refclk_freq property by sending the set_property command and five argument bytes. ar g1 of the set_property command is always 0x00. arg2 and arg3 are used to select the property number , prop (0x0201 in this example), and arg4 and arg5 are used to set the property value, propd (0x8000 or 32768 hz in the example). the implementation of the command and response procedures in the system controller differs for each of the three bus modes. section "6. control interface" on page 206 deta ils the required bit transactions on the control bus for each of the bus modes. table 2. using the tx_tune_freq command action data description cmd 0x30 tx_tune_freq arg1 0x00 arg2 0x27 set station to 101.1 mhz arg3 0x7e (0x277e = 10110 with 10 khz step size) status ? 0x80 reply status. clear-to-send high. table 3. using the set_property command action data description cmd 0x12 set_property arg1 0x00 arg2 (prop) 0x02 refclk_freq arg3 (prop) 0x01 arg4 (propd) 0x80 32768 hz arg5 (propd) 0x00 status ? 0x80 reply status. clear-to-send high.
an332 rev. 1.0 7 5. commands and properties there are four differ ent components for th ese product families: 1. fm transmitter component 2. fm receiver component 3. am/sw/lw component 4. wb component the following four subsections list all the commands and properties used by each of the component. 5.1. commands and proper ties for the fm/rds transmi tter (si4710/11/12/13/20/21) the following two tables are the summary of the commands and properties for the fm/rds transmitter component applicable to si4710/11/12/13/20/21. table 4. fm/rds transmitter command summary cmd name description available in 0x01 power_up power up device and mode selection. modes include fm transmit and analog/digital au dio interface configuration. all 0x10 get_rev returns revision information on the device. all 0x11 power_down power down device. all 0x12 set_property sets the value of a property. all 0x13 get_property retrieves a property?s value. all 0x14 get_int_status read interrupt status bits. all 0x15 patch_args* reserved command us ed for patch file downloads. all 0x16 patch_data* reserved command used for patch file downloads. all 0x30 tx_tune_freq tunes to given transmit frequency. all 0x31 tx_tune_power sets the output power level and tunes the antenna capaci- tor. all 0x32 tx_tune_measure measure the received noise level at the specified fre- quency. si4712/13/20 /21 0x33 tx_tune_status queries the status of a previo usly sent tx tune freq, tx tune power, or tx tune measure command. all 0x34 tx_asq_status queries the tx status and input audio signal metrics. all 0x35 tx_rds_buff queries the status of the rds group buffer and loads new data into buffer. si4711/13/21 0x36 tx_rds_ps set up default ps strings. si4711/13/21 0x80 gpio_ctl configures gpo1, 2, and 3 as output or hi-z. all except si4710-a10 0x81 gpio_set sets gpo1, 2, and 3 output level (low or high). all except si4710-a10 *note: commands patch_args and patch_data are only used to patch firmware. for information on applying a patch file, see "7.2. powerup from a component patch" on page 216.
an332 8 rev. 1.0 table 5. fm transmitter property summary prop name description default available in 0x0001 gpo_ien enables interrupt sources. 0x0000 all 0x0101 digital_input _format 1 configures the digital input format. 0x0000 all except si4710-a10 0x0103 digital_input _sample_rate 1 configures the digital input sample rate in 1 hz steps. default is 0. 0x0000 all except si4710-a10 0x0201 refclk_freq sets frequency of the reference clock in hz. the range is 31130 to 34406 hz, or 0 to disable the afc. default is 32768 hz. 0x8000 all 0x0202 refclk_prescale sets the prescaler value for the refer- ence clock. 0x0001 all 0x2100 tx_component_enable enable transmit mu ltiplex signal com- ponents. default has pilot and l-r enabled. 0x0003 all 0x2101 tx_audio_deviation configures audio frequency deviation level. units are in 10 hz increments. default is 6825 (68.25 khz). 0x1aa9 all 0x2102 tx_pilot_deviation configures pilot tone frequency devi- ation level. units are in 10 hz incre- ments. default is 675 (6.75 khz) 0x02a3 all 0x2103 tx_rds_deviation 2 configures the rds/rbds fre- quency deviation level. units are in 10 hz increments. default is 2 khz. 0x00c8 si4711/13/21 0x2104 tx_line_input_level configures maximum analog line input level to the lin/rin pins to reach the maximum deviation level programmed into the audio deviation property tx audio deviation. default is 636 mv pk . 0x327c all 0x2105 tx_line_input_mute sets line input mute. l and r inputs may be independently muted. default is not muted. 0x0000 all 0x2106 tx_preemphasis configures pre-emphasis time con- stant. default is 0 (75 s). 0x0000 all 0x2107 tx_pilot_frequency configures the frequency of the ste- reo pilot. default is 19000 hz. 0x4a38 all notes: 1. digital audio input feature (propert y digital_input_format and digita l_input_sample_rate) is supported in fmtx component 2.0 or later. 2. rds feature (command tx_rds_buff, tx_rds_ps and rds properties 0x2103, 0x2c00 through 2c07) is supported in fmtx component 2.0 or later. 3. limiter feature (limiten bit in tx_acomp_enable a nd property tx_limiter_release_time) is supported in fmtx component 2.0 or later.
an332 rev. 1.0 9 0x2200 tx_acomp_enable 3 enables audio dynamic range control and limiter. default is 2 (limiter is enabled, audio dynamic range control is disabled). 0x0002 all 0x2201 tx_acomp_threshold sets the threshol d level for audio dynamic range control. default is ?40 db. 0xffd8 all 0x2202 tx_acomp_attack_time sets the attack time for audio dynamic range control. default is 0 (0.5 ms). 0x0000 all 0x2203 tx_acomp_release_time sets the release time for audio dynamic range control. default is 4 (1000 ms). 0x0004 all 0x2204 tx_acomp_gain sets the gain for audio dynamic range control. default is 15 db. 0x000f all 0x2205 tx_limiter_release_time 3 sets the limiter release time. default is 102 (5.01 ms) 0x0066 all except si4710-a10 0x2300 tx_asq_interrupt_source configures measurements related to signal quality metrics. default is none selected. 0x0000 all 0x2301 tx_asq_level_low configures low audio input level detection threshold. this threshold can be used to detect silence on the incoming audio. 0x0000 all 0x2302 tx_asq_duration_low configures the duration which the input audio level must be below the low threshold in order to detect a low audio condition. 0x0000 all 0x2303 tx_asq_level_high configures high audio input level detection threshold. this threshold can be used to detect activity on the incoming audio. 0x0000 all 0x2304 tx_asq_duration_high configures the duration which the input audio level must be above the high threshold in order to detect a high audio condition. 0x0000 all 0x2c00 tx_rds_interrupt_source 2 configure rds interrupt sources. default is none selected. 0x0000 si4711/13/21 table 5. fm transmitter property summary (continued) prop name description default available in notes: 1. digital audio input feature (propert y digital_input_format and digita l_input_sample_rate) is supported in fmtx component 2.0 or later. 2. rds feature (command tx_rds_buff, tx_rds_ps and rds properties 0x2103, 0x2c00 through 2c07) is supported in fmtx component 2.0 or later. 3. limiter feature (limiten bit in tx_acomp_enable a nd property tx_limiter_release_time) is supported in fmtx component 2.0 or later.
an332 10 rev. 1.0 0x2c01 tx_rds_pi 2 sets transmit rds program identifier. 0x40a7 si4711/13/21 0x2c02 tx_rds_ps_mix 2 configures mix of rds ps group with rds group buffer. 0x0003 si4711/13/21 0x2c03 tx_rds_ps_misc 2 miscellaneous bits to transmit along with rds_ps groups. 0x1008 si4711/13/21 0x2c04 tx_rds_ps_repeat_count 2 number of times to repeat transmis- sion of a ps message before trans- mitting the next ps message. 0x0003 si4711/13/21 0x2c05 tx_rds_ps_message_count 2 number of ps messages in use. 0x0001 si4711/13/21 0x2c06 tx_rds_ps_af 2 rds program service alternate fre- quency. this provides the ability to inform the receiver of a single alter- nate frequency us ing af method a coding and is transmitted along with the rds_ps groups. 0xe0e0 si4711/13/21 0x2c07 tx_rds_fifo_size 2 number of blocks reserved for the fifo. note that the value written must be one larger than the desired fifo size. 0x0000 si4711/13/21 table 5. fm transmitter property summary (continued) prop name description default available in notes: 1. digital audio input feature (propert y digital_input_format and digita l_input_sample_rate) is supported in fmtx component 2.0 or later. 2. rds feature (command tx_rds_buff, tx_rds_ps and rds properties 0x2103, 0x2c00 through 2c07) is supported in fmtx component 2.0 or later. 3. limiter feature (limiten bit in tx_acomp_enable a nd property tx_limiter_release_time) is supported in fmtx component 2.0 or later.
an332 rev. 1.0 11 table 6. status response bitd7d6d5d4d3d2d1d0 status cts err x x x rdsint asqint stcint bit name function 7cts clear to send. 0 = wait before sending next command. 1 = clear to send next command. 6err error. 0=no error 1 = error 5:3 reserved values may vary. 2 rdsint rds interrupt. 0 = rds interrupt has not been triggered. 1 = rds interrupt has been triggered. 1asqint signal quality interrupt. 0 = signal quality measurement has not been triggered. 1 = signal quality measurement has been triggered. 0stcint seek/tune complete interrupt. 0 = tune complete has not been triggered. 1 = tune complete has been triggered.
an332 12 rev. 1.0 5.1.1. commands and properties for the fm/rds transmitter command 0x01. power_up initiates the boot process to move the device from powerdown to powerup mode. the boot can occur from internal device memory or a system controller downloaded patch. to confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the power_up command with function = 15 (query library id). the device will return th e response, including the libra ry revision, and then moves into powerdown mode. the device can then be placed in powerup mode by issuing the power_up command with function = 2 (transmit) and the pa tch may be applied. only the status byte will be returned in the response stream in transmit mode. the power_up command configur es the state of din (pin 13 ), dfs (pin 14), and rin (pin 15) and lin (pin 16) for analog or digital audio modes and gpo2/int (pin 18) for interrupt operation. the command configures gpo2/int interrupts (gpo2oen) an d cts interrupts (ctsien). if both are enabled, gpo2/int is driven high during normal operation and low for a minimum of 1 s during the interrupt. the ctsien bit is duplicated in the gpo_ien property. the command is complete when the cts bit (and optional interrupt) is set. note: to change function (e.g., fm tx to fm rx), issue th e power_down command to st op the current function; then, issue power_up to start the new function. note: delay at least 500 ms between powerup command and first tu ne command to wait for the oscillator to stabilize if xoscen is set and crystal is used as the rclk. available in: all command arguments: two response bytes: none (func = 2), seven (func = 15) command bit d7d6d5d4d3d2d1d0 cmd 00000001 arg1 ctsien gpo2oen patch xoscen func[3:0] arg2 opmode[7:0] arg bit name function 1 7 ctsien cts interrupt enable. 0 = cts interrupt disabled. 1 = cts interrupt enabled. 1 6 gpo2oen gpo2 output enable. 0 = gpo2 output disabled, (hi-z). 1 = gpo2 output enabled. 15 patch patch enable. 0 = boot normally 1 = copy non-volatile memory to ram, but do not boot. after cts has been set, ram may be patched
an332 rev. 1.0 13 response (to func = 2, tx) response (to func = 15, query library id) 1 4 xoscen crystal oscillator enable. 0 = use external rclk (cry stal oscillator disabled). 1 = use crystal oscillator (rclk and gp o3/dclk with external 32.768 khz crys- tal and opmode=01010000). see si47xx data sheet application schematic for external bom details. 1 3:0 func[3:0] function. 0?1, 3?14 = reserved. 2 = transmit. 15 = query library id. 2 7:0 opmode[7:0] application setting 01010000 = analog audio inputs (lin/rin) 00001111 = digital audio inputs (din/dfs/dclk) bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint bit d7 d6 d5d4d3 d2 d1 d0 status cts err x x x rdsint asqint stcint resp1 pn[7:0] resp2 fwmajor[7:0] resp3 fwminor[7:0] resp4 reserved[7:0] resp5 reserved[7:0] resp6 chiprev[7:0] resp7 libraryid[7:0] resp bit name function 1 7:0 pn[7:0] final 2 digits of part number. 2 7:0 fwmajor[7:0] firmware major revision. 3 7:0 fwminor[7:0] firmware minor revision. 4 7:0 reserved[7:0] reserved, various values. 5 7:0 reserved[7:0] reserved, various values. 6 7:0 chiprev[7:0] chip revision. 7 7:0 libraryid[7:0] library revision. arg bit name function
an332 14 rev. 1.0 command 0x10. get _ rev returns the part number, chip revision, firmware revision , patch revision and component revision numbers. the command is complete when the cts bit (and optional interrupt) is set. this command may only be sent when in powerup mode. available in: all command arguments: none response bytes: eight command response bit d7d6d5 d4 d3 d2 d1 d0 cmd 000 1 0 0 0 0 bit d7d6d5d4d3d2d1d0 status cts err x x x rdsint asqint stcint resp1 pn[7:0] resp2 fwmajor[7:0] resp3 fwminor[7:0] resp4 patch h [7:0] resp5 patch l [7:0] resp6 cmpmajor[7:0] resp7 cmpminor[7:0] resp8 chiprev[7:0] resp bit name function 1 7:0 pn[7:0] final 2 digits of part number 2 7:0 fwmajor[7:0] firmware major revision 3 7:0 fwminor[7:0] firmware minor revision 4 7:0 patch h [7:0] patch id high byte 5 7:0 patch l [7:0] patch id low byte 6 7:0 cmpmajor[7:0] component major revision 7 7:0 cmpminor[7:0] component minor revision 8 7:0 chiprev[7:0] chip revision
an332 rev. 1.0 15 command 0x11. power _ down moves the device from powerup to powerdo wn mode. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent wh en in powerup mode. note that only the power_up command is accepted in powerdown mode. if the system controller writes a command other than power_up when in powerdown mode, the device does not respond. the device will only respond when a power_up command is written. gpo pins are powered down and no t active during this state. for optimal power down current, gpo2 must be either internally driven low through gpio_ctl command or externally driven low. note: in fmtx component 1.0 and 2.0, a re set is required when the system contro ller writes a command other than pow- er_up when in powerdown mode. note: the following describes the state of all the pins when in powerdown mode: gpio1, gpio2, and gpio3 = 0 din, dfs, rin, lin = hiz available in: all command arguments: none response bytes: none command response bit d7 d6 d5 d4 d3 d2 d1 d0 cmd 000 1 0 0 0 1 bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 16 rev. 1.0 command 0x12. set _ property sets a property shown in table 5, ?fm transmitter property summary,? on page 8. the cts bit (and optional interrupt) is set when it is safe to send the next co mmand. this command may only be sent when in powerup mode. see figure 29, ?cts and set_property command complete tcomp timing model,? on page 226 and table 45, ?command timing parameters for the fm transmitter,? on page 227. available in: all command arguments: five response bytes: none command response bit d7d6d5d4d3d2d1d0 cmd 00010010 arg1 00000000 arg2 prop h [7:0] arg3 prop l [7:0] arg4 propd h [7:0] arg5 propd l [7:0] arg bit name function 1 7:0 reserved always write to 0. 2 7:0 prop h [7:0] property high byte. this byte in combination with prop l is used to specif y the property to modify. see section "5.1.2. fm/rds transmitter properties" on page 31. 3 7:0 prop l [7:0] property low byte. this byte in combination with prop h is used to specify the property to modify. see section "5.1.2. fm/rds transmitter properties" on page 31. 4 7:0 propd h [7:0] property value high byte. this byte in combination with propv l is used to set the property value. see section "5.1.2. fm/rds transmitter properties" on page 31. 5 7:0 propd l [7:0] property value low byte. this byte in combination with propv h is used to set th e property value. see section "5.1.2. fm/rds transmitter properties" on page 31. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 rev. 1.0 17 command 0x13. get _ property gets a property shown in table 5, ?fm transmitter property summary,? on page 8. the cts bit (and optional interrupt) is set when it is safe to send the next co mmand. this command may only be sent when in powerup mode. available in: all command arguments: three response bytes: three command response bit d7d6d5d4d3d2d1d0 cmd 00010011 arg1 00000000 arg2 prop h [7:0] arg3 prop l [7:0] arg bit name function 1 7:0 reserved always write to 0. 27:0 prop h [7:0] property get high byte. this byte in combination with prop l is used to specify the property to get. 37:0 prop l [7:0] property get low byte. this byte in combination with prop h is used to specify the property to get. bitd7d6d5d4d3d2d1d0 status cts err x x x rdsint asqint stcint resp1 xxxxxxxx resp2 propd h [7:0] resp3 propd l [7:0] resp bit name function 1 7:0 reserved reserved, various values. 27:0propd h [7:0] property value high byte. this byte in combination with propv l will represent t he request ed prop- erty value. 37:0propd l [7:0] property value high byte. this byte in combination with propv h will represent the requested prop- erty value.
an332 18 rev. 1.0 command 0x14. get _ int _ status updates bits 6:0 of the status byte. this command shou ld be called after any command that sets the stcint, asqint, or rdsint bits. when polling this command should be periodically called to monitor the status byte, and when using interrupts, this command should be called after the interrupt is set to update the status byte. the command is complete when the cts bit (and optional interrupt) is set. this command may only be sent when in powerup mode. available in: all command arguments: none response bytes: none command response bit d7d6d5d4d3d2d1d0 cmd 00010100 bitd7d6d5d4d3d2d1d0 status cts err x x x rdsint asqint stcint
an332 rev. 1.0 19 command 0x30. tx _ tune _ freq sets the state of the rf carrier and sets the tuning fr equency between 76 and 108 mhz in 10 khz units and steps of 50 khz. for example 76.05 mhz = 7605 is valid be cause it follows the 50 khz step requirement but 76.01 mhz = 7601 is not valid. the cts bit (and optional in terrupt) is set when it is safe to send the next command. the err bit (and optional interrupt) is set if an invalid argument is sent. note that only a single interrupt occurs if both the cts and err bits are set. the optional stc interrupt is set when the command completes. the stcint bit is set only after the get_int_status comman d is called. this command may only be sent when in powerup mode. the command clears the stc bit if it is al ready set. see figure 28, ?cts and stc timing model,? on page 226 and table 45, ?command timing parameters for the fm transmitter,? on page 227. available in: all command arguments: three response bytes: none command response bit d7d6d5d4d3d2d1d0 cmd 00110000 arg1 00000000 arg2 freq h [7:0] arg3 freq l [7:0] arg bit name function 1 7:0 reserved always write to 0. 27:0freq h [7:0] tune frequency high byte. this byte in combination with freq l selects the tune frequency in units of 10 khz. the valid range is from 7600 to 10800 (76?108 mhz). the frequency must be a multiple of 50 khz. 37:0freq l [7:0] tune frequency low byte. this byte in combination with freq h selects the tune frequency in units of 10 khz. the valid range is from 7600 to 10800 (76?108 mhz). the frequency must be a multiple of 50 khz. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 20 rev. 1.0 command 0x31. tx _ tune _ power sets the rf voltage level between 88 dbv and 115 dbv in 1 db units. power may be set as high as 120 dbv; however, voltage accuracy is not guaranteed. a value of 0x00 indicates off. the command also sets the antenna tuning capacitance. a value of 0 indicates autotuning, and a value of 1?191 indicates a manual override. the cts bit (and optional interrupt) is set when it is safe to se nd the next command. the err bit (and optional interrupt) is set if an invalid argument is sent. note that only a single interrupt occurs if both the cts and err bits are set. the optional stc interrupt is set when the command comp letes. the stcint bit is set only after the get_int_status command is called. this command may only be sent when in powerup mode. the command clears the stc bit if it is already set. see figure 2 8, ?cts and stc timing model,? on page 226 and table 45, ?command timing parameters for the fm transmitter,? on page 227. available in: all command arguments: four response bytes: none command response bit d7d6d5d4d3d2d1d0 cmd 00110001 arg1 00000000 arg2 00000000 arg3 rfdbv[7:0] arg4 antcap[7:0] arg bit name function 1 7:0 reserved always write to 0. 2 7:0 reserved always write to 0. 3 7:0 rfdbv[7:0] tune power byte. sets the tune power in dbv in 1 db steps. the valid range is from 88? 115 dbv. power may be set as high as 120 dbv; however, voltage accu- racy is not guaranteed. 4 7:0 antcap[7:0] antenna tuning capacitor. this selects the value of the antenna tuning capacitor manually, or automati- cally if set to zero. the valid range is 0 to 191, which results in a tuning capacitance of 0.25 pf x antcap. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 rev. 1.0 21 command 0x32. tx _ tune _ measure enters receive mode (disables transmitter output power) and measures the received noise level (rnl) in units of dbv on the selected frequency. the command sets the tuning frequency between 76 and 108 mhz in 10 khz units and steps of 50 khz. for example 76.05 mhz = 7605 is valid because it follows the 50 khz step requirement but 76.01 mhz = 7601 is not valid. the command also sets th e antenna tuning capacitance. a value of 0 indicates autotuning, and a value of 1?191 indicates a manual override. the cts bit (and optional interrupt) is set when it is safe to send the next command. the err bit (and optional inte rrupt) is set if an invalid argument is sent. note that only a single interrupt occurs if both the cts and err bi ts are set. the optional stc interrupt is set when the command completes. the stcint bit is set only after the get_int_status command is called. this command may only be sent when in powerup mode. the command clears the stc bit if it is alre ady set. see figure 28, ?cts and stc timing model,? on page 226 and table 45, ?com mand timing parameters for the fm transmitter,? on page 227. available in: si4712/13/20/21 command arguments: four response bytes: none command response bit d7d6d5d4d3d2d1d0 cmd 00110010 arg1 00000000 arg2 freq h [7:0] arg3 freq l [7:0] arg4 antcap[7:0] arg bit name function 1 7:0 reserved always write to 0. 27:0 freq h [7:0] tune frequency high byte. this byte in combination with freq l selects the tune frequency in units of 10 khz. in fm mode the valid range is from 7600 to 10800 (76?108 mhz). the frequency must be a multiple of 50 khz. 37:0 freq l [7:0] tune frequency low byte. this byte in combination with freq h selects the tune frequency in units of 10 khz. in fm mode the valid range is from 7600 to 10800 (76?108 mhz). the frequency must be a multiple of 50 khz. 4 7:0 antcap[7:0] antenna tuning capacitor. this selects the value of the antenna tuning capacitor manually, or auto- matic if set to zero. the valid range is 0?191. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 22 rev. 1.0 command 0x33. tx _ tune _ status returns the status of the tx_tune_freq, tx_t une_measure, or tx_tune_power commands. the command returns the current frequency, output voltage in dbv (if applicable), the antenna tuning capacitance value (0?191) and the received noise level (if applicable). the command clears the stcint interrupt bit when intack bit of arg1 is set. the cts bit (and optional interrup t) is set when it is safe to send the next command. this command may only be sent when in powerup mode. available in: all command arguments: one response bytes: seven command response bit d7d6d5d4d3d2d1d0 cmd 00110011 arg1 0000000intack arg bit name function 1 7:1 reserved always write to 0. 10 intack seek/tune interrupt clear. if set this bit clears the seek/tune complete interrupt status indicator. bitd7d6d5d4d3d2d1d0 status cts err x x x rdsint asqint stcint resp1 xxxxxxxx resp2 readfreq h [7:0] resp3 readfreq l [7:0] resp4 xxxxxxxx resp5 readrfdbv[7:0] resp6 readantcap[7:0] resp7 rnl[7:0]
an332 rev. 1.0 23 resp bit name function 1 7:0 reserved returns various data. 2 7:0 readfreq h [7:0] read frequency high byte. this byte in combination with readfreq l returns frequency being tuned. 37:0readfreq l [7:0] read frequency low byte. this byte in combination with readfreq h returns frequency being tuned. 4 7:0 reserved returns various data. 5 7:0 readrfdbv[7:0] read power. returns the transmit ou tput voltage setting. 6 7:0 readantcap [7:0] read antenna tuning capacitor. this byte will contain the curren t antenna tuning capacitor value. 7 7:0 rnl[7:0] read received noise level (si4712/13 only). this byte will contain the receive level as the response to a tx tune mea- sure command. the returned value will be the last rnl measurement (or 0 if no measurement has been performed) for the tx tune freq and tx tune power commands.
an332 24 rev. 1.0 command 0x34. tx _ asq _ status returns status information about the audio signal quality and current fm transmit frequency. this command can be used to check if the input audio stream is below a low threshold as reported by the iall bit, or above a high threshold as reported by the ialh bit. the thresholds can be configured to detect a s ilence condition or an activity condition which can then be used by the host to take an appropriate action such as turning off the carrier in the case of prolonged silence. the thresholds are set using the tx_ asq_level_low and tx_asq_level_high properties. the audio must be above or below the threshol d for greater than the amount of time specified in the tx_asq_duration_low and tx_asq_duration_high properti es for the status to be detected. additionally the command can be used to determine if an overmodulation condition has occurred or the limiter has engaged, as reported by the overmod bit, in whic h case the host could reduce the audio level to the part. if any of the overmod, ialh, or iall bits are set, the asqint bit will also be set. the asqint bit can be routed to a hardware interrupt via the gpo_ien property. clearing the ialh or iall interrupts will result in the tx_asq _duration_low or tx_asq_duration_high counters being rearmed, respectively, to start another detection interval measurement. the command clears the asqint interrupt bit and overmod, ialh, and iall bits when the intack bit of arg1 is set. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. note that the tx_asq_durati on_low and tx_asq_duration_high counters start and the tx_asq_status command will only retu rn valid data after a call to tx_tune_freq, tx_tune_power, or tx_tune_measure. available in: all command arguments: one response bytes: four command bit d7d6d5d4d3d2d1d0 cmd 00110100 arg1 0000000intack arg bit name function 10 intack interrupt acknowledge. 0 = interrupt status preserved. 1 = clears asqint, overmod, ialdh, and ialdl.
an332 rev. 1.0 25 response bit d7d6d5d4d3 d2 d1d0 status cts err x x x rdsint asqint stcint resp1 x x x x x overmod ialh iall resp2 xxxxx x xx resp3 xxxxx x xx resp4 inlevel[7:0] resp bit name function 1 2 overmod overmodulation detection. 0 = output signal is below requested modulation level. 1 = output signal is abov e requested modulation level. 11 ialh input audio level threshold detect high. 0 = input audio level high threshold not exceeded. 1 = input audio level high threshold exceeded. 10 iall input audio level threshold detect low. 0 = input audio level low threshold not exceeded. 1 = input audio level low threshold exceeded. 27:0 reserved returns various values. 37:0 reserved returns various values. 4 7:0 inlevel[7:0] input audio level. the current audio input level measured in dbfs (2s complement nota- tion).
an332 26 rev. 1.0 command 0x35. tx _ rds _ buff loads or clears the rds group buffer fifo or circular buffer and returns the fifo status. the buffer can be allocated between the circular buffer and fifo with the tx_rds_fifo_size property. a common use case for the circular buffer is to broadcast group 2a radio text, a nd a common use case for the fifo is to broadcast group 4a real time clock. the command clears the intack interrupt bit when the intack bit of arg1 is set. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. note: tx_rds_buff is supported in fmtx component 2.0 or later. available in: si4711/13/21 command arguments: seven response bytes: five command bit d7d6d5d4d3d2d1d0 cmd 00110101 arg1 fifo 0 0 0 0 ldbuff mtbuff intack arg2 rdsb h [7:0] arg3 rdsb l [7:0] arg4 rdsc h [7:0] arg5 rdsc l [7:0] arg6 rdsd h [7:0] arg7 rdsd l [7:0] arg bit name function 1 7 fifo operate on fifo. if set, the command operates on the fifo buffer. if cleared, the command operates on the circular buffer. 1 6:3 reserved always write to 0. 12 ldbuff load rds group buffer. if set, loads the rds group buffer with rdsb, rdsc, and rdsd. block a data is generated from the rds_tx_pi property when the buffer is transmit- ted. 11 mtbuff empty rds group buffer. if set, empties the rds group buffer. 10 intack clear rds group buffer interrupt. if set this bit clears the rds group buffer interrupt indicator. 27:0 rdsb h [7:0] rds block b high byte. this byte in combination with rdsb l sets the rds block b data.
an332 rev. 1.0 27 response 37:0 rdsb l [7:0] rds block b low byte. this byte in combination with rdsb h sets the rds block b data. 4 7:0 rdsc h [7:0] rds block c high byte. this byte in combination with rdsc l sets the rds block c data. 5 7:0 rdsc l [7:0] rds block c low byte. this byte in combination with rdsc h sets the rds block c data. 6 7:0 rdsd h [7:0] rds block d high byte. this byte in combination with rdsd l sets the rds block d data. 7 7:0 rdsd l [7:0] rds block d low byte. this byte in combination with rdsd h sets the rds block d data. bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint resp1 x x x rdspsxmit cbufxmit fifoxmit cbufwrap fifomt resp2 cbavail[7:0] resp3 cbused[7:0] resp4 fifoavail[7:0] resp5 fifoused[7:0] resp bit name function 1 7:5 reserved values may vary. 1 4 rdspsxmit interrupt source: rds ps group has been transmitted. 1 3 cbufxmit interrupt source: rds group has been transmitted from the fifo buffer. 1 2 fifoxmit interrupt source: rds group has been transmitted from the circular buffer. 1 1 cbufwrap interrupt source: rds group circular buffer has wrapped. 1 0 fifomt interrupt source: rds group fifo buffer is empty. 2 7:0 cbavail[7:0] returns the number of available circular buffer blocks. 3 7:0 cbused[7:0] returns the number of used circular buffer blocks. 4 7:0 fifoavail[7:0] returns the numb er of available fifo blocks. 5 7:0 fifoused[7:0] returns the number of used fifo blocks. arg bit name function
an332 28 rev. 1.0 command 0x36. tx _ rds _ ps loads or clears the program service buffer. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. note: tx_rds_ps is supported in fmtx component 2.0 or later. available in: si4711/13/21 command arguments: five response bytes: none command response bit d7d6d5d4d3d2d1d0 cmd 00110110 arg1 0 0 0 psid[4:0] arg2 pschar0 [7:0] arg3 pschar1 [7:0] arg4 pschar2 [7:0] arg5 pschar3 [7:0] arg bit name function 1 7:5 reserved always write to 0. 1 4:0 psid[4:0] selects which ps data to load (0?23) 0 = first 4 characters of ps0. 1 = last 4 characters of ps0. 2 = first 4 characters of ps1. 3 = last 4 characters of ps1. . . . 22 = first 4 characters of ps11. 23 = last 4 characters of ps11. 2 7:0 pschar0[7:0] rds psid char0. first character of selected psid. 3 7:0 pschar1[7:0] rds psid char1. second character of selected psid. 4 7:0 pschar2[7:0] rds psid char2. third character of selected psid. 5 7:0 pschar3[7:0] rds psid char3. fourth character of selected psid. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 rev. 1.0 29 command 0x80. gpio_ctl enables output for gpo1, 2, and 3. gpo1, 2, and 3 can be configured for output (hi-z or active drive) by setting the gpo1oen, gpo2oen, and gpo3oen bit. the state (high or low) of gpo1, 2, and 3 is set with the gpio_set command. to avoid excessive current consumption due to oscillation , gpo pins should not be left in a high impedance state. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. t he default is all gpo pins set for high impedance. notes: 1. gpio_ctl is fully supported in fmtx component 3.0 or la ter. only bit gpo3oen is su pported in fmtx comp 2.0. 2. the use of gpo2 as an interrupt pin and /or the use of gpo3 as dclk digital clock input will override this gpio_ctl function for gpo2 and/or gpo3 respectively. available in: all except si4710-a10 command arguments: one response bytes: none command response bitd7d6d5d4d3d2d1d0 cmd 10000000 arg1 0 0 0 0 gpo3oen gpo2oen gpo1oen 0 arg bit name function 1 7:4 reserved always write 0. 1 3 gpo3oen gpo3 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 2 gpo2oen gpo2 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 1 gpo1oen gpo1 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 0 reserved always write 0. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 30 rev. 1.0 command 0x81. gpio_set sets the output level (high or low) for gpo1, 2, and 3. gpo1, 2, and 3 can be configured for output by setting the gpo1oen, gpo2oen, and gpo3oen bit in the gpio_ct l command. to avoid excessive current consumption due to oscillation, gpo pins should not be left in a high impedance state. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is all gpo pins set for high impedance. note: gpio_set is fully-supported in fmtx comp 3.0 or later. only bit gpo3l evel is supported in fmtx comp 2.0. available in: all except si4710-a10 command arguments: one response bytes: none command response bit d7 d6d5d4 d3 d2 d1 d0 cmd 10000001 arg1 0 0 0 0 gpo3level gpo2level gpo1level 0 arg bit name function 1 7:4 reserved always write 0. 1 3 gpo3level gpo3 output level. 0 = output low (default). 1 = output high. 1 2 gpo2level gpo3 output level. 0 = output low (default). 1 = output high. 1 1 gpo1level gpo3 output level. 0 = output low (default). 1 = output high. 1 0 reserved always write 0. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 rev. 1.0 31 5.1.2. fm/rds transmitter properties property 0x0001. gpo_ien configures the sources for the gpo2/int interrupt pin. valid sources are the lower 8 bits of the status byte, including cts, err, rdsint, asqint, and stcint bits. th e corresponding bit is set before the interrupt occurs. the cts bit (and optional interrupt) is set when it is safe to send the next command. the cts interrupt enable (ctsien) can be set with this property and the power_up command. the state of the ctsien bit set during the power_up command can be read by reading the this pr operty and modified by writing this property. this property may only be set or read when in powerup mode. the default is no interrupts enabled. available in: all default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 00000 rdsrep asqrep stcrep ctsien errien 000 rdsien asqien stcien bit name function 15:11 reserved always write to 0. 10 rdsrep rds interrupt repeat. (si4711/13/21 only) 0 = no interrupt generated when rdsint is already set (default). 1 = interrupt generated even if rdsint is already set. 9asqrep asq interrupt repeat. 0 = no interrupt generated when asqrep is already set (default). 1 = interrupt generated even if asqrep is already set. 8 stcrep stc interrupt repeat. 0 = no interrupt generated when stcrep is already set (default). 1 = interrupt generated even if stcrep is already set. 7ctsien cts interrupt enable. 0 = no interrupt generated when cts is set (default). 1 = interrupt generat ed when cts is set. after powerup, this bit will reflect the ct sien bit in arg1 of powerup command. 6 errien err interrupt enable. 0 = no interrupt generated when err is set (default). 1 = interrupt generat ed when err is set. 5:3 reserved always write to 0. 2 rdsien rds interrupt enable (si4711/13/21 only). 0 = no interrupt generated when rdsint is set (default). 1 = interrupt generated when rdsint is set. 1 asqien audio signal quality interrupt enable. 0 = no interrupt generated when asqint is set (default). 1 = interrupt generated when asqint is set. 0stcien seek/tune complete interrupt enable. 0 = no interrupt generated when stcint is set (default). 1 = interrupt generated when stcint is set.
an332 32 rev. 1.0 property 0x0101. digital_input_format configures the digital input format. the cts bit (and optio nal interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. note: digital_input_format is supported in fmtx component 2.0 or later. available in: all except si4710-a10 default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 00000000ifall imode[3:0] imonoisize[1:0] bit name function 15:8 reserved always write to 0. 7ifall dclk falling edge. 0 = sample on dclk rising edge (default). 1 = sample on dclk falling edge. 6:3 imode[3:0] digital mode. 0000 = default 0001 = i 2 s mode. 0111 = left-justified mode. 1101 = msb at 1 st dclk rising edge after dfs pulse. 1001 = msb at 2 nd dclk rising edge after dfs pulse. 2imono mono audio mode. 0 = stereo audio mode (default). 1 = mono audio mode. 1:0 isize[1:0] digital audio sample precision. 00 = 16 bits (default) 01 = 20 bits 10 = 24 bits 11 = 8 bits
an332 rev. 1.0 33 property 0x0103. digital_input_sample_rate configures the digital input sample rate in 1 hz units. the input sample rate must be set to 0 before removing the dclk input or reducing the dcl k frequency below 2 mhz. if this guidelin e is not followed, a device reset will be required. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. tx_tun e_freq command must be sent after the power_up command to start the internal clocking before setting this property. note: digital_input_sample_rate is support ed in fmtx component 2.0 or later. available in: all except si4710-a10 default: 0x0000 units: 1 hz step: 1 hz range: 0, 32000-48000 bitd15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name disr[15:0] bit name function 15:0 disr digital input sample rate. 0 = disabled. required before removing dclk or reducing dclk frequency below 2 mhz. the range is 32000?48000 hz.
an332 34 rev. 1.0 property 0x0201. refclk_freq sets the frequency of the refclk from the output of the prescaler. (figure 1 shows the relation between rclk and refclk.) the refclk range is 31130 to 34406 hz (32768 5% hz) in 1 hz steps, or 0 (to disable afc). for example, an rclk of 13 mhz would require a prescaler value of 400 to divide it to 32500 hz refclk. the reference clock frequency property would then need to be set to 32500 hz. rclk frequencies between 31130 hz and 40 mhz are supported, however, there are gaps in frequency coverage for prescaler values ranging from 1 to 10, or frequencies up to 311300 hz. table 7 summarizes these rclk gaps. figure 1. refclk prescaler the rclk must be valid 10 ns before and 10 ns af ter sending the tx_tune_measure, tx_tune_freq, or tx_tune_power commands. in addition, the rclk must be valid at all times when the carrier is enabled for proper afc operation. the rclk may be removed or reconfigured at other times. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 32768 hz. available in: all default: 0x8000 (32768) units: 1 hz step: 1 hz range: 31130?34406 table 7. rclk gaps prescaler rclk low (hz) rclk high (hz) 1 31130 34406 2 62260 68812 3 93390 103218 4 124520 137624 5 155650 172030 6 186780 206436 7 217910 240842 8 249040 275248 9 280170 309654 10 311300 344060 rclk refclk pin 9 prescaler divide by 1-4095 31.130 khz ? 40 mhz 31.130 khz ? 34.406 khz
an332 rev. 1.0 35 property 0x0202. refclk_prescale sets the number used by the prescaler to divide the exte rnal rclk down to the internal refclk. the range may be between 1 and 4095 in 1 unit steps. for example, an rclk of 13 mhz would require a prescaler value of 400 to divide it to 32500 hz. the reference clock frequency property would then need to be set to 32500 hz. the rclk must be valid 10 ns before and 10 ns after sending the tx_tune_measure, tx_tune_freq, or tx_tune_power commands. in addition, the rclk must be valid at all times when the carrier is enabled for proper afc operation. the rclk may be removed or reco nfigured at other times. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 1. available in: all default: 0x0001 step: 1 range: 1?4095 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name refclkf[15:0] bit name function 15:0 refclkf[15:0] frequency of reference clock in hz. the allowed refclk frequency range is between 31130 and 34406 hz (32768 5%), or 0 (to disable afc). bitd15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000 rclk sel rclkp[11:0] bit name function 15:13 reserved always write to 0. 12 rclksel rclksel. 0 = rclk pin is clock source. 1 = dclk pin is clock source. 11:0 refclkp[11:0] prescaler for reference clock. integer number used to divide the rclk frequency down to refclk frequency. the allowed refclk frequency range is between 31130 and 34406 hz (32768 5%), or 0 (to disable afc).
an332 36 rev. 1.0 property 0x2100. tx_component_enable individually enables the stereo pilot, left minus right stereo and rds components. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is stereo pilot and le ft minus right stereo components enabled. available in: all default: 0x0003 property 0x2101. tx_audio_deviation sets the transmit audio deviation from 0 to 90 khz in 10 hz units. the sum of the audio deviation, pilot deviation and rds deviation should not exceed regulatory requ irements, typically 75 khz. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 6825, or 68.25 khz. available in: all default: 0x1aa9 (6825) units: 10 hz step: 10 hz range: 0?9000 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1 d0 name 0000000000000rdslmrpilot bit name function 15:3 reserved always write 0. 2rds rds enable (si4711/13/21 only). 0 = disables rds (default). 1 = enables rds to be transmitted. 1lmr left minus right. 0 = disables left minus right. 1 = enables left minus right (stereo) to be transmitted (default). 0pilot pilot tone. 0 = disables pilot. 1 = enables the pilot tone to be transmitted (default). bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name txadev[15:0] bit name function 15:0 txadev[15:0] transmit audio frequency deviation. audio frequency deviation is programmable from 0 hz to 90 khz in 10 hz units. default is 6825 (68.25 khz). note that the total deviation of the audio, pilot, and rds must be less than 75 khz to meet regulatory requirements.
an332 rev. 1.0 37 property 0x2102. tx_pilot_deviation sets the transmit pilot deviation from 0 to 90 khz in 10 hz units. the sum of the audio deviation, pilot deviation and rds deviation should not exceed regulatory requirements, typically 75 khz. the cts bit (and optional interrupt) is set when it is safe to send the next command. this prope rty may only be set or read when in powerup mode. the default is 675, or 6.75 khz. available in: all default: 0x02a3 (675) units: 10 hz step: 10 hz range: 0?9000 property 0x2103. tx_rds_deviation sets the rds deviation from 0 to 7.5 khz in 10 hz units . the sum of the audio deviation, pilot deviation and rds deviation should not exceed regulatory requirements, typically 75 khz. the cts bit (and optional interrupt) is set when it is safe to send the next command. this prop erty may only be set or read when in powerup mode. the default is 200, or 2 khz. available in: si4711/13/21 default: 0x00c8 (200) units: 10 hz step: 10 hz range: 0?9000 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name txpdev[15:0] bit name function 15:0 txpdev[15:0] transmit pilot frequency deviation. pilot tone frequency deviation is programmable from 0 hz to 90 khz in 10 hz units. default is 675 (6.75 khz). note that the to tal deviation of the audio, pilot, and rds must be less than 75 khz to meet regulatory requirements. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name txrdev[15:0] bit name function 15:0 txrdev[15:0] transmit rds frequency deviation. rds frequency deviation is programmable from 0 hz to 90 khz in 10 hz units. default is 200 (2 khz). note that the total deviation of the audio, pilot, and rds must be less than 75 khz to meet regulatory requirements.
an332 38 rev. 1.0 property 0x2104. tx_line_input_level sets the input resistance and maximum audio input leve l for the lin/rin pins. an application providing a 150 mv pk input to the device on rin/lin would set line attenuati on = 00, resulting in a maximu m permissible input level of 190 mv pk on lin/rin and an input resistance of 396 k ? . the line level would be set to 150 mv to correspond to the tx audio deviation level set by the tx_audio_deviation property. an application providing a 1 v pk input to the device on rin/lin would set line attenuation = 11, resulting in a maximum permissible input level of 636 mv pk on lin/rin and an input resistance of 60 k ? . an external series resistor on lin and rin inputs of 40 k ? would create a resistive voltage divider that would keep the maximum line level on rin/lin below 636 mv pk . the line level would be set to 636 mv pk to correspond to the tx audio deviati on level set by the tx_audio_deviation property. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default input level and peak line level is 636 mv pk with an input impedance of 60 k ? . available in: all default: 0x327c bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 0 liatten[1:0] 0 0 lilevel[9:0] bit name function 15:14 reserved always write to 0. 13:12 liatten[1:0] line attenuation. 00 = max input level = 190 mv pk ; input resistance = 396 k ?? 01 = max input level = 301 mv pk ; input resistance = 100 k ? 10 = max input level = 416 mv pk ; input resistance = 74 k ? 11 = max input level = 636 mv pk ; input resistance = 60 k ?? (default) 11:10 reserved always write to 0. 9:0 lilevel[9:0] line level. maximum line amplitud e level on the lin/rin pins in mv pk . the default is 0x27c or 636 mv pk .
an332 rev. 1.0 39 property 0x2105. tx_line_input_mute selectively mutes the left and right audio inputs. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. available in: all default: 0x0000 property 0x2106. tx_preemphasis sets the transmit pre-emphasis to 50 s, 75 s or off. the cts bit (and optional interrupt) is set wh en it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 75 s. available in: all default: 0x0000 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2 d1 d0 name 0 0 0 0 0 0 00000000limuterimute bit name function 15:2 reserved always write to 0. 1limute mutes l line input. 0 = no mute (default) 1=mute 0rimute mutes r line input. 0 = no mute (default) 1=mute bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 00000000000000fmpe[1:0] bit name function 15:2 reserved always write to 0. 1:0 fmpe[1:0] fm pre-emphasis. 00 = 75 s. used in usa (default) 01 = 50 s. used in europe, australia, japan 10 = disabled 11 = reserved
an332 40 rev. 1.0 property 0x2107. tx_pilot_frequency this property is used to se t the frequency of the stereo pilot in 1 hz st eps. the stereo pilot is nominally set to 19 khz for stereo operation, however the pilot can be se t to any frequency from 0 hz to 19 khz to support the generation of an audible test tone. the pilot tone is enabled by setting the pilot bit (d0) of the tx_component_enable property. when using the stereo p ilot as an audible test generator it is recommended that the rds bit (d2) be disabled. the cts bit (and optio nal interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. available in: all default: 0x4a38 (19000) units: 1 hz step: 1 hz range: 0?19000 property 0x2200. tx_acomp_enable selectively enables the audio dynamic range control and limit er. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may on ly be set or read when in powerup mode. the default is limiter enabled and audio dynamic range control disabled. note: limiten bit is supported in fmtx component 2.0 or la ter. reset this bit to 0 in fmtx component 1.0. available in: all default: 0x0002 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name freq[15:0] bit name function 15:0 freq stereo pilot frequency sets the frequency of the stereo pilot in 1 hz steps. range 0 hz?19000 hz (default is 0x4a38 or 19 khz). bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 00000000000000limitenacen bit name function 15:2 reserved always write to 0. 1 limiten audio limiter. 0=disable 1 = enable (default) 0acen transmit audio dynamic range control enable. 0 = audio dynamic range control disabled (default) 1 = audio dynamic range control enabled
an332 rev. 1.0 41 property 0x2201. tx_acomp_threshold sets the threshold for audio dynamic range control from 0 dbfs to ?40 dbfs in 1 db units in 2's complement notation. for example, a setting of ?40 db would be 65536 ? 40 = 65496 = 0xffd8. the threshold is the level below which the device applies the gain set by the tx_acomp_gain property, and above which the device applies the compression defined by (gain + threshold) / thre shold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 0xffd8, or ?40 dbfs. available in: all default: 0xffd8 (?40) units: 1 db step: 1 db range: ?40 to 0 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name threshold[15:0] bit name function 15:0 threshold[15:0] transmit audio dynamic range control threshold. range is from ?40 to 0 dbfs in 1 db steps (0xffd8?0x0). default is 0xffd8 (?40 dbfs).
an332 42 rev. 1.0 property 0x2202. tx_acomp_attack_time sets the time required for the device to respond to audio level transitions from below the threshold in the gain region to above the threshold in the compression region. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 0.5 ms, or 0. available in: all default: 0x0000 range: 0?9 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000000 attack[3:0] bit name function 15:4 reserved always write to 0. 3:0 attack[3:0] transmit audio dynamic range control attack time. 0 = 0.5 ms (default) 1 = 1.0 ms 2 = 1.5 ms 3 = 2.0 ms 4 = 2.5 ms 5 = 3.0 ms 6 = 3.5 ms 7 = 4.0 ms 8 = 4.5 ms 9 = 5.0 ms
an332 rev. 1.0 43 property 0x2203. tx_acomp_release_time sets the time required for the device to respond to audio level transitions from above the threshold in the compression region to below the threshold in the gain region . the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 1000 ms, or 4. available in: all default: 0x0004 range: 0?4 property 0x2204. tx_acomp_gain sets the gain for audio dynamic range control from 0 to 20 db in 1 db units. for example, a setting of 15 db would be 15 = 0xf. the gain is applied to the audio below the threshold set by the tx_acomp_threshold property. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 15 db or 0xf. available in: all default: 0x000f (15) units: 1 db step: 1 db range: 0?20 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0000000000000release[2:0] bit name function 15:3 reserved always write to 0. 2:0 release[2:0] transmit audio dynamic range control release time. 0 = 100 ms 1 = 200 ms 2 = 350 ms 3 = 525 ms 4 = 1000 ms (default) bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name gain[5:0] bit name function 15:6 reserved always write to 0. 5:0 gain[5:0] transmit audio dynamic range control gain. range is from 0 to 20 db in 1 db steps. default is 15.
an332 44 rev. 1.0 property 0x2205. tx_limiter_release_time sets the time required for the device to respond to audio le vel transitions from above the limiter threshold to below the limiter threshold. the cts bit (and optional interrup t) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 5.01 ms, or 102. note: tx_limiter_release_time is supported in fmtx component 2.0 or later. available in: all except si4710-a10 default 0x0066 (102) step: 1 range: 5?2000 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name limitertc[15:0] bit name function 15:0 lmitertc[15:0] sets the limiter release time. 5 = 102.39 ms 6 = 85.33 ms 7 = 73.14 ms 8 = 63.99 ms 10 = 51.19 ms 13 = 39.38 ms 17 = 30.11 ms 25 = 20.47 ms 51 = 10.03 ms 57 = 8.97 ms 64 = 7.99 ms 73 = 7.01 ms 85 = 6.02 ms 102 = 5.01 ms (default) 127 = 4.02 ms 170 = 3.00 ms 255 = 2.00 ms 510 = 1.00 ms 1000 = 0.50 ms 2000 = 0.25 ms
an332 rev. 1.0 45 property 0x2300. tx_asq_interrupt_select this property is used to enable which audio signal quality (asq) measurements trigger asq_int bit in the tx_asq_status command. overmodien bit enables asq in terrupt by the overmod bi t, which turns on with overmodulation of the fm output signal due to excessive input signal level. ialhien and iallien bits enable asq interrupt by the ialh and iall bits, which report high or low input audio condition. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. available in: all default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0000000overmodienialhieniallien bit name function 15:3 reserved always write to 0. 2 overmodien overmodulation detection enable. 0 = overmod detect disabled (default). 1 = overmod detect enabled. 1 ialhien input audio level detection high threshold enable. 0 = ialh detect disabled (default). 1 = ialh detect enabled. 0 iallien input audio level detection low threshold enable. 0 = iall detect disabled (default). 1 = iall detect enabled.
an332 46 rev. 1.0 property 0x2301. tx_asq_level_low this property sets the low audio level threshold relative to 0 dbfs in 1 db increments, which is used to trigger the iall bit. this threshold can be set to detect a silence condition in the input audio allowing the host to take an appropriate action such as disabling the rf carrier or powering down the chip. the cts bit (and optional interrupt) is set when it is safe to send the next command. this pr operty may only be set or read when in powerup mode. the default is 0x0000 and the range is 0 to ?70. available in: all default: 0x0000 units: 1 db step: 1 db range: ?70 to 0 property 0x2302. tx_asq_duration_low this property is used to determine the duration (in 1 m s increments) that the input signal must be below the tx_asq_level_low threshold in order for an iall condition to be generated. the range is 0 ms to 65535 ms, and the default is 0 ms. note that the tx_asq_dura tion_low and tx_asq_durati on_high counters start and the tx_asq_status command will only retu rn valid data after a call to tx_tune_freq, tx_tune_power, or tx_tune_measure. the cts bit (and opti onal interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. available in: all default: 0x0000 units: 1 ms step: 1 ms range: 0?65535 bit d15 d14 d13 d12 d11 d10d9d8d7d6d5d4d3d2d1d0 name 00000000 iallth[7:0] bit name function 15:8 reserved always write to 0. 7:0 iallth[7:0] input audio level low threshold . threshold which input audio level must be below in order to detect a low audio condition. specified in units of dbfs in 1 db steps (?70 .. 0). default is 0. bit d15 d14 d13 d12 d11 d10d9d8d7d6d5d4d3d2d1d0 name ialldur[15:0] bit name function 15:0 ialldur[15:0] input audio level duration low. required duration the input audio level must fall below iallth to trigger an iall inter- rupt. specified in 1ms increments (0?65535 ms). default is 0.
an332 rev. 1.0 47 property 0x2303. tx_asq_level_high this property sets the high audio level threshold relative to 0 dbfs in 1 db increments, which is used to trigger the ialh bit. this threshold can be set to detect an activity condition in the input audio allowing the host to take an appropriate action such as enabling the rf carrier afte r an extended silent period. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 0x0000 and the range is 0 to ?70. available in: all default: 0x0000 units: 1 db step: 1 db range: ?70 to 0 bit d15 d14 d13 d12 d11 d10d9d8d7d6d5d4d3d2d1d0 name 00000000 ialhth[7:0] bit name function 15:8 reserved always write to 0. 7:0 ialhth[7:0] input audio level high threshold threshold which input audio level must be abov e in order to detect a high audio condition. specified in units of dbfs in 1 db steps (?70 .. 0). default is 0.
an332 48 rev. 1.0 property 0x2304. tx_asq_duration_high this property is used to determine the duration (in 1 m s increments) that the input signal must be above the tx_asq_level_high threshold in order for a ialh condit ion to be generated. the range is 0 to 65535 ms, and the default is 0 ms. note that the tx_asq_duratio n_low and tx_asq_duration_high counters start and the tx_asq_status command will only return valid data after a call to tx_tune_freq, tx_tune_power, or tx_tune_measure. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. available in: all default: 0x0000 units: 1 ms step: 1 ms range: 0?65535 bit d15 d14 d13 d12 d11 d10d9d8d7d6d5d4d3d2d1d0 name ialhdur[15:0] bit name function 15:0 ialhdur[15:0] input audio level duration high. required duration the input audio level must exceed ialhth to trigger an ialh inter- rupt. specified in 1 ms increments (0 ? 65535 ms). default is 0.
an332 rev. 1.0 49 property 0x2c00. tx_rds_interrupt_source configures the rds interrupt sources. the cts bit (and opti onal interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. note: tx_rds_interrupt_source is supported in fmtx component 2.0 or later. available in: si4711/13/21 default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 00000000000 rds psxmit rds cbufxmit rds- fifoxmit rds cbufwrap rds- fifomt bit name function 4 rdspsxmit 0 = do not interrupt (default). 1 = interrupt when a rds ps group has been transmitted. the interrupt occurs when a ps group begins transmission. 3 rdscbufxmit 0 = do not interrupt (default). 1 = interrupt when a rds group has been transmitted from the circular buffer. the interrupt occurs when a group is fetched from the buffer. 2 rdsfifoxmit 0 = do not interrupt (default). 1 = interrupt when a rds group has been transmitted from the fifo buffer. the interrupt occurs when a group is fetched from the buffer. 1 rdscbufwrap 0 = do not interrupt (default). 1 = interrupt when the rds group circular buffer has wrapped. the interrupt occurs when the last group is fetched from the buffer. 0 rdsfifomt 0 = do not interrupt (default). 1 = interrupt when the rds group fifo buffer is empty. the interrupt occurs when the last group is fetched from the fifo.
an332 50 rev. 1.0 property 0x2c01. tx_rds_pi sets the rds pi code to be transmitted in block a and block c (for type b groups). the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. note: tx_rds_pi is supported in fmtx component 2.0 or later. available in: si4711/13/21 default: 0x40a7 property 0x2c02. tx_rds_ps_mix sets the ratio of rds ps (group 0a) and circular buffer/fifo groups. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. note: tx_rds_ps_mix is supported in fmtx component 2.0 or later. available in: si4711/13/21 default: 0x0003 range: 0?6 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name rdspi[15:0] bit name function 15:0 rdspi[15:0] transmit rds program identifier. rds program identifier data. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2 d1 d0 name 0000000000000 rdspsmix[2:0] bit name function 15:3 reserved always write to 0. 2:0 rdspsmix[2:0] transmit rds mix. 000 = only send rds ps if rds group buffer is empty 001 = send rds ps 12.5% of the time 010 = send rds ps 25% of the time 011 = send rds ps 50% of the time (default) 100 = send rds ps 75% of the time 101 = send rds ps 87.5% of the time 110 = send rds ps 100% of the time
an332 rev. 1.0 51 property 0x2c03. tx_rds_ps_misc configures miscellaneous rds flags. the cts bit (and option al interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. note: tx_rds_ps_misc is supported in fmtx component 2.0 or later. available in: si4711/13/21 default: 0x1008 bit d15 d14 d13 d12 d11 d10 d9d8d7d6d5 d4 d3 d2d1d0 name rdsd3 rdsd2 rdsd1 rdsd0 forceb rdstp rdspty[4:0] rdsta rdsms 0 0 0 bit name function 15 rdsd3 dynamic pty code. 0 = static pty (default). 1 = indicates that the pty code is dynamically switched. 14 rdsd2 compressed code. 0 = not compressed (default). 1 = compressed. 13 rdsd1 artificial head code. 0 = not artificial head (default). 1 = artificial head. 12 rdsd0 mono/stereo code. 0 = mono. 1 = stereo (default). 11 forceb use the pty and tp set here in all block b data. 0 = fifo and buffer use pty and tp as when written (default). 1 = fifo and buffer force pty and tp to be the settings in this property. 10 rdstp traffic program code (default = 0). 9:5 rdspty[4:0] program type code (default = 0). 4rdsta traffic announcement code (default = 0). 3rdsms music/speech switch code. 0 = speech. 1 = music (default). 2:0 reserved always write to 0.
an332 52 rev. 1.0 property 0x2c04. tx_rds_ps_repeat_count sets the number of times a program serv ice group 0a is repeated. the cts bit (and optional interrupt) is set when it is safe to send the next comm and. this property may only be set or read when in powerup mode. note: tx_rds_ps_repeat_count is supported in fmtx component 2.0 or later. available in: si4711/13/21 default: 0x0003 range: 1?255 property 0x2c05. tx_rds_ps_message_count sets the number of program service messages through whic h to cycle. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. note: tx_rds_ps_message_count is supported in fmtx component 2.0 or later. available in: si4711/13/21 default: 0x0001 range 1?12 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 00000000 rd spsrc[7:0] bit name function 15:8 reserved always write to 0. 7:0 rdspsrc[7:0] transmit rds ps repeat count. number of times to repeat transmission of a ps message before transmitting the next ps message. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000000 rd spsmc[3:0] bit name function 15:4 reserved always write to 0. 3:0 rdspsmc[3:0] transmit rds ps message count. number of ps messages to cycle through. default is 1.
an332 rev. 1.0 53 property 0x2c06. tx_rds_ps_af sets the af rds program service altern ate frequency. this provid es the ability to inform the receiver of a single alternate frequency using af method a coding and is tr ansmitted along with the rds_ps groups. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. note: tx_rds_ps_af is supported in fmtx component 2.0 or later. available in: si4711/13/21 default: 0xe0e0 range: 0xe000?0xe0cc bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name rdsaf[15:0] bit name function 15:0 rdsaf[15:0] transmit rds program service alternate frequency. 0xe101 = 1 af @ 87.6 mhz 0xe102 = 1 af @ 87.7 mhz ... 0xe1cb = 1 af @ 107.8 mhz 0xe1cc = 1 af @ 107.9 mhz 0xe0e0 = no af exists (default)
an332 54 rev. 1.0 property 0x2c07. tx_rds_fifo_size sets the rds fifo size in number of blocks. note that the valu e written must be one larg er than the desired fifo size. the number of bl ocks allocated will reduce the si ze of the circular rds group buffer by the same amount. for instance, if rdsfifosz = 20, then the rds circular buffer will be reduced by 20 blocks. the minimum number of blocks which should be allo cated is 4. this provides enough room for a single group of any type (xa or xb) to be transmitted. groups xa require 3 blocks, groups xb require 2 blocks as block c' is always the same as the rds pi code. before setting this value, determine the availa ble blocks through the tx_rds_fifo command, as the buffer size may vary between versions or part nu mbers. the guaranteed minimum fifo size, however, is 53 blocks. the rds fifo and the rds circular buffer s hould be emptied with the tx_rds_fifo command prior to changing the size of the fifo. the cts bit (and optional in terrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. note: tx_rds_fifo_size is supported in fmtx component 2.0 or later. available in: si4711/13/21 default: 0x0000 units: blocks step: 3 blocks range: 0, 4, 7, 10?54 note : actual maximum fifo size returned by the tx_rds_b uff command is larger, howeve r, this is 53 blocks is the guaranteed fifo size. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 00000000 rdsfifosz[7:0] bit name function 15:8 reserved always write 0. 7:0 rdsfifosz[7:0] transmit rds fifo size. 0 = fifo disabled (default)
an332 rev. 1.0 55 5.2. commands and proper ties for the fm/rds receiver (si4704/05/06/2x/3x/4x/84/85) tables 8 and 9 summarize the commands and properties for the fm/rds receiver component applicable to si4704/05/06/2x/3x/4x/84/85. table 8. fm/rds receiver command summary cmd name description available in 0x01 power_up power up device and mode selection. all 0x10 get_rev returns revision information on the device. all 0x11 power_down power down device. all 0x12 set_property sets the value of a property. all 0x13 get_property retrieve s a property?s value. all 0x14 get_int_status reads interrupt status bits. all 0x15 patch_args* reserved command used for patch file downloads. all 0x16 patch_data* reserved command used for patch file downloads. all 0x20 fm_tune_freq selects the fm tuning frequency. all 0x21 fm_seek_start begins search ing for a valid frequency. all 0x22 fm_tune_status queries the status of previous fm_tune_freq or fm_seek_start command. all 0x23 fm_rsq_status queries the status of the received signal quality (rsq) of the current channel. all 0x24 fm_rds_status returns rds information for curren t channel and reads an entry from rds fifo . si4705/06, si4721, si474x, si4731/35/37/39, si4785 0x27 fm_agc_status queries the current agc settings all 0x28 fm_agc_override override agc setting by disabling and forcing it to a fixed value all 0x80 gpio_ctl configures gpo1, 2, and 3 as output or hi-z. all except si4730-a10 0x81 gpio_set sets gpo1, 2, and 3 output level (low or high). all except si4730-a10 *note: commands patch_args and patch_data are only used to patch firmware. for information on applying a patch file, see "7.2. powerup from a component patch" on page 216.
an332 56 rev. 1.0 table 9. fm/rds receiver property summary prop name description default available ? in 0x0001 gpo_ien enables interrupt sources. 0x0000 all 0x0102 digital_output_ format configure digital audio outputs. 0x0000 si4705/06, si4721/31/35/37/ 39, si4730/34/36/38- d60 and later, si4741/43/45, si4784/85 0x0104 digital_output_ sample_rate configure digital audio output sample rate. 0x0000 si4705/06, si4721/31/35/37/ 39, si4730/34/36/38- d60 and later, si4741/43/45, si4784/85 0x0201 refclk_freq sets frequency of re ference clock in hz. the range is 31130 to 34406 hz, or 0 to disable the afc. default is 32768 hz. 0x8000 all 0x0202 refclk_prescale sets the prescaler value for rclk input. 0x0001 all 0x1100 fm_deemphasis sets deemphasis time constant. default is 75 s. 0x0002 all except si4749 0x1102 fm_channel_filter selects bandwidth of channel filter applied at the demodulation stage. 0x0001 si4706, si4749, si4705/31/35/85- d50 and later 0x0000 si4704/30/34/84- d50 and later 0x1105 fm_blend_stereo_ threshold selects bandwidth of channel filter applied at the demodulation stage. 0x0031 si470x/2x, si473x-c40 and earlier 0x1106 fm_blend_mono_ threshold sets rssi threshold for mono blend (full mono below threshold, blend above threshold). to force stereo set this to 0. to force mono set this to 127. default value is 30 dbv. 0x001e si470x/2x, si473x-c40 and earlier 0x1107 fm_antenna_input selects the antenna type and the pin to which it is connected. 0x0000 si4704/05/06/20/ 21 0x1108 fm_max_tune_ error sets the maximum freq error allowed before setting the afc rail (afcrl) indica- tor. default value is 20 khz. 0x001e all 0x0014 all others 0x1200 fm_rsq_int_ source configures interrupt related to received signal quality metrics. 0x0000 all 0x1201 fm_rsq_snr_hi_ threshold sets high threshold for snr interrupt. 0x007f all
an332 rev. 1.0 57 0x1202 fm_rsq_snr_lo_ threshold sets low threshold for snr interrupt. 0x0000 all 0x1203 fm_rsq_rssi_hi_ threshold sets high threshold for rssi interrupt. 0x007f all 0x1204 fm_rsq_rssi_lo_ threshold sets low threshold for rssi interrupt. 0x0000 all 0x1205 fm_rsq_multipath_hi_ threshold sets high threshold for multipath interrupt. 0x007f si4706-c30 and later, si474x, si4704/05/30/31/ 34/35/84/85-d50 and later 0x1206 fm_rsq_multipath_ lo_threshold sets low threshold for multipath interrupt. 0x0000 si4706-c30 and later, si474x, si4704/05/30/31/ 34/35/84/85-d50 and later 0x1207 fm_rsq_blend_ threshold sets the blend threshold for blend interrupt when boundary is crossed. 0x0081 all except si4749 0x1300 fm_soft_mute_rate sets the attack and decay rates when entering and leaving soft mute. 0x0040 si4706/07/20/21/ 84/85-b20 and earlier, si4704/05/3x- c40 and earlier 0x1301 fm_soft_mute_slope configures attenuation slope during soft mute in db attenuation per db snr below the soft mute snr threshold. default value is 2. 0x0002 si4704/05/06/3x- c40 and later, si4740/41/42/43/ 44/45 0x1302 fm_soft_mute_ max_attenuation sets maximum attenuation during soft mute (db). set to 0 to disable soft mute. default is 16 db. 0x0010 all except si4749 0x1303 fm_soft_mute_ snr_threshold sets snr threshold to engage soft mute. default is 4 db. 0x0004 all except si4749 0x1304 fm_soft_mute_ release_rate sets soft mute release rate. smaller values provide slower release, and larger values provide faster release. the default is 8192 (approximately 8000 db/s) 0x2000 si4706-c30 and later, si4740/41/42/43/ 44/45, si4704/05/30/31/ 34/35/84/85-d50 and later table 9. fm/rds receiver property summary (continued) prop name description default available ? in
an332 58 rev. 1.0 0x1305 fm_soft_mute_ attack_rate sets soft mute attack rate. smaller values provide slower attack, and larger values provide faster attack. the default is 8192 (approximately 8000 db/s) 0x2000 si4706-c30 and later, si4740/41/42/43/ 44/45, si4704/05/30/31/ 34/35/84/85-d50 and later 0x1400 fm_seek_band_ bottom sets the bottom of the fm band for seek. default is 8750 (87.5 mhz). 0x222e all 0x1401 fm_seek_band_top sets the top of the fm band for seek. default is 10790 (107.9 mhz). 0x2a26 all 0x1402 fm_seek_freq_ spacing selects frequency spacing for fm seek. default value is 10 (100 khz). 0x000a all 0x1403 fm_seek_tune_ snr_threshold sets the snr threshold for a valid fm seek/tune. default value is 3 db. 0x0003 all 0x1404 fm_seek_tune_ rssi_treshold sets the rssi threshold for a valid fm seek/tune. default value is 20 dbv. 0x0014 all 0x1500 fm_rds_int_source configures rds interrupt behavior. 0x0000 si4705/06, si4721, si431/35/37/39, si4741/43/45/49 0x1501 fm_rds_int_fifo_ count sets the minimum number of rds groups stored in the receive fifo required before rdsrecv is set. 0x0000 si4705/06, si4721, si431/35/37/39, si4741/43/45/49 0x1502 fm_rds_config configures rds setting. 0x0000 si4705/06, si4721, si431/35/37/39, si4741/43/45/49 0x1503 fm_rds_confidence sets the confidence level threshold for each rds block. 0x1111 si4706-c30 and later, si474x, si4704/05/30/31/ 34/35/84/85-d50 and later 0x1700 fm_agc_attack_rate sets the agc attack rate. larger values provide slower attack and smaller values provide faster attack. the default is 4 (approximately 1500 db/s). 0x0004 si474x 0x1701 fm_agc_release_rate sets the agc release rate. larger values provide slower release and smaller values provide faster release. the default is 140 (approximately 43 db/s). 0x008c si474x table 9. fm/rds receiver property summary (continued) prop name description default available ? in
an332 rev. 1.0 59 0x1800 fm_blend_rssi_ stereo_threshold sets rssi threshold for stereo blend. (full stereo above threshold, blend below threshold.) to force stereo, set this to 0. to force mono, set this to 127. default value is 49 db v. 0x0031 si4706-c30 and later, si4740/41/42/43/ 44/45, si4705/31/35/85- d50 and later 0x1801 fm_blend_rssi_mono_ threshold sets rssi threshold for mono blend (full mono below threshold, blend above threshold). to force stereo, set this to 0. to force mono, set this to 127. default value is 30 db v. 0x001e si4706-c30 and later, si4740/41/42/ 43/44/45, si4705/31/35/85 -d50 and later 0x1802 fm_blend_rssi_ attack_rate sets the stereo to mono attack rate for rssi based blend. smaller values provide slower attack and larger values provide faster attack. the default is 4000 (approxi- mately 16 ms). 0x0fa0 si4706-c30 and later, si4740/41/42/ 43/44/45, si4705/31/35/85 -d50 and later 0x1803 fm_blend_rssi_ release_rate sets the mono to stereo release rate for rssi based blend. smaller values provide slower release and larger values provide faster release. the default is 400 (approxi- mately 164 ms). 0x0190 si4706-c30 and later, si4740/41/42/ 43/44/45, si4705/31/35/85 -d50 and later 0x1804 fm_blend_snr_ stereo_threshold sets snr threshold for stereo blend (full stereo above threshold, blend below threshold). to force stereo, set this to 0. to force mono, set this to 127. default value is 27 db. 0x001b si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x1805 fm_blend_snr_mono_ threshold sets snr threshold for mono blend (full mono below threshold, blend above threshold). to force stereo, set this to 0. to force mono, set this to 127. default value is 14 db. 0x000e si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later table 9. fm/rds receiver property summary (continued) prop name description default available ? in
an332 60 rev. 1.0 0x1806 fm_blend_snr_attack_ rate sets the stereo to mono attack rate for snr based blend. smaller values provide slower attack and larger values provide faster attack. the default is 4000 (approxi- mately 16 ms). 0x0fa0 si4740/41/42/ 43/44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35 /84/85-d50 and later 0x1807 fm_blend_snr_ release_rate sets the mono to stereo release rate for snr based blend. smaller values provide slower release and larger values provide faster release. the default is 400 (approxi- mately 164 ms). 0x0190 si4740/41/42/ 43/44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35 /84/85-d50 and later 0x1808 fm_blend_multipath_ stereo_threshold sets multipath threshold for stereo blend (full stereo below threshold, blend above threshold). to force stereo, set this to 100. to force mono, set this to 0. default value is 20. 0x0014 si4740/41/42/ 43/44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x1809 fm_blend_multipath_- mono_threshold sets multipath threshold for mono blend (full mono above threshold, blend below threshold). to force stereo, set to 100. to force mono, set to 0. the default is 60. 0x003c si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x180a fm_blend_multipath_ attack_rate sets the stereo to mono attack rate for mul- tipath based blend. smaller values provide slower attack and larger values provide faster attack. the default is 4000 (approxi- mately 16 ms). 0x0fa0 si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later table 9. fm/rds receiver property summary (continued) prop name description default available ? in
an332 rev. 1.0 61 0x180b fm_blend_multipath_ release_rate sets the mono to stereo release rate for multipath based blend. smaller values pro- vide slower release and larger values pro- vide faster release. the default is 40 (approximately 1.64 s). 0x0028 si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x180c fm_blend_max_ste- reo_separation sets the maximum amount of stereo separation 0x0000 si474x 0x1900 fm_nb_detect_ threshold sets the threshold for detecting impulses in db above the noise floor. default value is 16. 0x0010 si4742/43/44/45 0x1901 fm_nb_interval interval in micro-seconds that original sam- ples are replaced by interpolated clean samples. default value is 24 s. 0x0018 si4742/43/44/45 0x1902 fm_nb_rate noise blanking rate in 100 hz units. default value is 64. 0x0040 si4742/43/44/45 0x1903 fm_nb_iir_filter sets the bandwidth of the noise floor esti- mator default value is 300. 0x012c si4742/43/44/45 0x1904 fm_nb_delay delay in micro-seco nds before applying impulse blanking to th e original samples. default value is 133. 0x00aa si4742/43/44/45 0x1a00 fm_hicut_ snr_high_ threshold sets the snr level at which hi-cut begins to band limit. default value is 24. 0x0018 si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x1a01 fm_hicut_ snr_low_- threshold sets the snr level at which hi-cut reaches maximum band limiting. default value is 15. 0x000f si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later table 9. fm/rds receiver property summary (continued) prop name description default available ? in
an332 62 rev. 1.0 0x1a02 fm_hicut_ attack_rate sets the rate at which hi-cut lowers the cut- off frequency. default value is 20000 (approximately 3 ms) 0x4e20 si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x1a03 fm_hicut_ release_rate sets the rate at which hi-cut increases the cut-off frequency. default value is 20. (approximately 3.3 s) 0x0014 si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x1a04 fm_hicut_ multipa- th_trigger threshold sets the multipath level at which hi-cut begins to band limit. default value is 20. 0x0014 si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x1a05 fm_hicut_ multipa- th_end_ threshold sets the multipath level at which hi-cut reaches maximum band limiting. default value is 60. 0x003c si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x1a06 fm_hicut_ cutoff_fre- quency sets the maximum band limit frequency for hi-cut and also sets the maximum audio frequency. default value is 0 (disabled). 0x0000 si4740/41/42/43/ 44/45, si4704/05-d50 and later, si4706-c30 and later , si4730/31/34/35/ 84/85-d50 and later 0x4000 rx_volume sets the output volume. 0x003f all except si4749 0x4001 rx_hard_mute mutes the audio output. l and r audio out- puts may be muted independently. 0x0000 all except si4749 table 9. fm/rds receiver property summary (continued) prop name description default available ? in
an332 rev. 1.0 63 table 10. status response for the fm/rds receiver bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint rdsint x stcint bit name function 7cts clear to send. 0 = wait before sending next command. 1 = clear to send next command. 6err error . 0=no error 1=error 5:4 reserved values may vary. 3rsqint received signal quality interrupt. 0 = received signal quality measurement has not been triggered. 1 = received signal quality measurement has been triggered. 2 rdsint radio data system (rds) interrupt (si4705/21/31/35/37/39/85 only). 0 = radio data system interrupt has not been triggered. 1 = radio data system interrupt has been triggered. 1 reserved values may vary. 0stcint seek/tune complete interrupt. 0 = tune complete has not been triggered. 1 = tune complete has been triggered.
an332 64 rev. 1.0 5.2.1. fm/rds receiver commands command 0x01. power_up initiates the boot process to move the device from powe rdown to powerup mode. the boot can occur from internal device memory or a system controller downloaded patch. to confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the power_up command with func = 15 (query library id). the device returns the resp onse, including the library revision, and then moves into powerdown mode. the device can then be placed in powerup mode by issuing the power_up command with func = 0 (fm receive) and the patch may be applied (see section "7.2. powerup from a component patch" on page 216). the power_up command configures the state of rout (p in 13, si474x pin 15) and lout (pin 14, si474x pin 16) for analog audio mode and gpo2/int (pin 18, si474x pin 20) for interrupt operation. for the si4705/21/31/35/37/39/84/85-b20, the power_up command also configures the state of gpo3/dclk (pin 17, si474x pin 19), dfs (pin 16, si474x pin 18), and dout (pin 15, si474x pin 17) for digital audio mode. the command configures gpo2/int interrupts (gpo2oen) and cts interrupts (ctsien). if both are enabled, gpo2/int is driven high during normal operation and low fo r a minimum of 1 s during the interrupt. the ctsien bit is duplicated in the gpo_ien property. the command is complete when the cts bit (and optional interrupt) is set. note: to change function (e.g. fm rx to am rx or fm rx to fm tx), issue power_down command to stop current func- tion; then, issue power_up to start new function. note: delay at least 500 ms between powerup command and first tu ne command to wait for the oscillator to stabilize if xoscen is set and crystal is used as the rclk. available in: all command arguments: two response bytes: none (func = 0), seven (func = 15) command bit d7 d6 d5d4d3d2d1d0 cmd 00000001 arg1 ctsien gpo2oen patch xoscen func[3:0] arg2 opmode[7:0] arg bit name function 17 ctsien cts interrupt enable. 0 = cts interrupt disabled. 1 = cts interrupt enabled. 1 6 gpo2oen gpo2 output enable. 0 = gpo2 output disabled. 1 = gpo2 output enabled. 15 patch patch enable. 0 = boot normally. 1 = copy nvm to ram, but do not boot. after cts has been set, ram may be patched.
an332 rev. 1.0 65 response (func = 0, fm receive) response (func = 15, query library id) 1 4 xoscen crystal oscillator enable. note: set to 0 for si4740/41/42/43/44/45/49 0 = use external rclk (cr ystal oscillator disabled). 1 = use crystal oscillator (rclk and gpo3 /dclk with external 32.768 khz crys- tal and opmode=00000101). see si47xx data sheet application schematic for external bom details. 1 3:0 func[3:0] function. 0=fm receive. 1?14 = reserved. 15 = query library id. 2 7:0 opmode[7:0] application setting. 00000000 = rds output only (no audio outputs) si4749 only 00000101 = analog audio outputs (lout/rout). 00001011 = digital audio output (dclk, lout/dfs, rout/dio) 10110000 = digital audio outputs (dclk, dfs, dio) (si4705/21/31/35/37/39/41/43/45/ 84/85 fmrx component 2.0 or later with xoscen = 0). 10110101 = analog and digital audio outputs (lout/rout and dclk, dfs, dio) (si4705/21/31/35/37/39/41/43 /45/84/85 fmrx component 2.0 or later with xoscen = 0). bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint rdsint x stcint bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint rdsint x stcint resp1 pn[7:0] resp2 fwmajor[7:0] resp3 fwminor[7:0] resp4 reserved[7:0] resp5 reserved[7:0] resp6 chiprev[7:0] resp7 libraryid[7:0] resp bit name function 1 7:0 pn[7:0] final 2 digits of part number (hex). 2 7:0 fwmajor[7:0] firmware major revision (ascii). 3 7:0 fwminor[7:0] firmware minor revision (ascii). arg bit name function
an332 66 rev. 1.0 command 0x10. get_rev returns the part number, chip revision, firmware revision, patch revision and component revision numbers. the command is complete when the cts bit (and optional inte rrupt) is set. this command may only be sent when in powerup mode. available in: all command arguments: none response bytes: fifteen (si4705/ 06 only), eight (si4704/2x/3x/4x) command response 4 7:0 reserved[7:0] reserved, various values. 5 7:0 reserved[7:0] reserved, various values. 6 7:0 chiprev[7:0] chip revision (ascii). 7 7:0 libraryid[7:0] library revision (hex). bit d7d6d5d4d3d2d1d0 cmd 000 1 0 0 0 0 bit d7d6d5d4d3d2d1d0 status cts err x x rsqint rdsint x stcint resp1 pn[7:0] resp2 fwmajor[7:0] resp3 fwminor[7:0] resp4 patch h [7:0] resp5 patch l [7:0] resp6 cmpmajor[7:0] resp7 cmpminor[7:0] resp8 chiprev[7:0] resp10 reserved resp11 reserved resp12 reserved resp13 reserved resp14 reserved resp15 cid[7:0] (si4705 only)
an332 rev. 1.0 67 command 0x11. power _ down moves the device from powerup to powerdo wn mode. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent wh en in powerup mode. note that only the power_up command is accepted in powerdown mode. if the system controller writes a command other than power_up when in powerdown mode, the device does not respond. the device will only respond when a power_up command is written. gpo pins are powered down and no t active during this state. for optimal power down current, gpo2 must be either internally driven low through gpio_ctl command or externally driven low. note: in fmrx component 1.0, a reset is required when the system controller writes a command other than power_up when in powerdown mode. note: the following describes the state of all the pins when in powerdown mode: gpio1, gpio2, and gpio3 = 0 rout, lout, dout, dfs = hiz available in: all command arguments: none response bytes: none command response resp bit name function 1 7:0 pn[7:0] final 2 digits of part number (hex). 2 7:0 fwmajor[7:0] firmware major revision (ascii). 3 7:0 fwminor[7:0] firmware minor revision (ascii). 47:0 patch h [7:0] patch id high byte (hex). 57:0 patch l [7:0] patch id low byte (hex). 6 7:0 cmpmajor[7:0] component major revision (ascii). 7 7:0 cmpminor[7:0] component minor revision (ascii). 8 7:0 chiprev[7:0] chip revision (ascii). 15 7:0 cid[7:0] cid (si4705/06 only). bit d7d6d5d4d3d2d1d0 cmd 00010001 bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint rdsint x stcint
an332 68 rev. 1.0 command 0x12. set_property sets a property shown in table 9, ?fm/rds receiver pr operty summary,? on page 56. the cts bit (and optional interrupt) is set when it is safe to send the next co mmand. this command may only be sent when in powerup mode. see figure 29, ?cts and set_property command complete tcomp timing model,? on page 226 and table 46, ?command timing parameters for the fm receiver,? on page 228. available in: all command arguments: five response bytes: none command bit d7d6d5d4d3d2d1d0 cmd 00010010 arg1 00000000 arg2 prop h [7:0] arg3 prop l [7:0] arg4 propd h [7:0] arg5 propd l [7:0] arg bit name function 1 7:0 reserved always write to 0. 27:0prop h [7:0] property high byte. this byte in combination with prop l is used to specify th e property to modify. 37:0prop l [7:0] property low byte. this byte in combination with prop h is used to specify the property to modify. 47:0propd h [7:0] property value high byte. this byte in combination with propd l is used to set th e property value. 57:0propd l [7:0] property value low byte. this byte in combination with propd h is used to set the property value.
an332 rev. 1.0 69 command 0x13. get_property gets a property as shown in table 9, ?fm/rds receiv er property summary,? on page 56. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. available in: all command arguments: three response bytes: three command response bit d7d6d5d4d3d2d1d0 cmd 00010011 arg1 00000000 arg2 prop h [7:0] arg3 prop l [7:0] arg bit name function 1 7:0 reserved always write to 0. 27:0 prop h [7:0] property high byte. this byte in combination with prop l is used to specify the property to get. 37:0 prop l [7:0] property low byte. this byte in combination with prop h is used to specify the property to get. bitd7d6d5d4d3d2d1d0 status cts err x x rsqint rdsint x stcint resp1 00000000 resp2 propd h [7:0] resp3 propd l [7:0] resp bit name function 1 7:0 reserved always returns 0. 27:0propd h [7:0] property value high byte. this byte in combination with propd l represents the requested property value. 37:0propd l [7:0] property value high byte. this byte in combination with propd h represents the re quested property value.
an332 70 rev. 1.0 command 0x14. get_int_status updates bits 6:0 of the status byte. this command shou ld be called after any command that sets the stcint, rdsint, or rsqint bits. when polling this command should be periodically called to m onitor the status byte, and when using interrupts, this command should be called af ter the interrupt is set to update the status byte. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be set when in powerup mode. available in: all command arguments: none response bytes: none command response command 0x20. fm_tune_freq sets the fm receive to tune a frequency between 64 and 108 mhz in 10 khz units. the cts bit (and optional interrupt) is set when it is safe to send the next command. the err bit (and optional interrupt) is set if an invalid argument is sent. note that only a si ngle interrupt occurs if both the cts and err bits are set. the optional stc interrupt is set when the command completes. the stcint bit is set only after the get_int_status command is called. this command may only be sent when in powerup mode. the command clears the stc bit if it is already set. see figure 28, ?cts and stc timing model,? on page 226 and table 46, ?command timing parameters for the fm receiver,? on page 228. fm: lo frequency is 128 khz above rf for rf frequencies < 90 mhz and 128 khz below rf for rf frequencies > 90 mhz. for example, lo frequency is 80.128 mhz when tuning to 80.00 mhz. note: for fmrx components 2.0 or earlier, tuning range is 76?108 mhz. note: fast bit is supported in fmrx components 4.0 or later. note: freeze bit is supported in fmrx components 4.0 or later. available in: all command arguments: four response bytes: none bit d7d6d5d4d3d2d1d0 cmd 00010100 bitd7d6d5d4d3d2d1d0 status cts err x x rsqint rdsint x stcint
an332 rev. 1.0 71 command response bit d7d6d5d4d3d2d1d0 cmd 00100000 arg1 000000freezefast arg2 freq h [7:0] arg3 freq l [7:0] arg4 antcap[7:0] arg bit name function 1 7:1 reserved always write to 0. 11 freeze freeze metrics during alternate frequency jump. if set will cause the blend, hicut, and soft mute to transition as a function of the associated attack/release parameters rather than instantaneously when tuning to alternate station. 1 0 fast fast tuning. if set, executes fast and invalidated tune. the tune st atus will not be accurate. 27:0freq h [7:0] tune frequency high byte. this byte in combination with freq l selects the tune frequency in 10 khz. in fm mode the valid range is from 6400 to 10800 (64?108 mhz). 37:0freq l [7:0] tune frequency low byte. this byte in combination with freq h selects the tune frequency in 10 khz. in fm mode the valid range is from 6400 to 10800 (64?108 mhz). 4 7:0 antcap[7:0] antenna tuning capacitor (valid only when using txo/lpi pin as the antenna input). this selects the value of the antenna tuning capacitor manually, or automati- cally if set to zero. the va lid range is 0 to 191. automatic capacitor tuning is recommended. note: when tuned manually, the varactor is offs et by four codes. for example, if the varactor is set to a value of 5 manually , when read back the value will be 1. the four codes (1pf) delta accounts for the capacitance at the chip. bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint rdsint x stcint
an332 72 rev. 1.0 command 0x21. fm_seek_start begins searching for a valid frequency. clears any pend ing stcint or rsqint interrupt status. the cts bit (and optional interrupt) is set when it is safe to send the ne xt command. rsqint status is only cleared by the rsq status command when the intack bit is set. the err bit (and optional interrupt) is se t if an invalid argument is sent. note that only a single interrupt occurs if both the cts and err bits are set. the optional stc interrupt is set when the command completes. the stcint bit is set only after the get_int_status command is called. this command may only be sent when in powerup mode. the command clears the stcint bit if it is already set. see figure 28, ?cts and stc timing model,? on page 226 and table 46, ?command timing parameters for the fm receiver,? on page 228. available in: all command arguments: one response bytes: none command response bit d7d6d5d4d3d2d1d0 cmd 00100001 arg1 0 0 0 0 seekup wrap 0 0 arg bit name function 1 7:4 reserved always write to 0. 1 3 seekup seek up/down. determines the direction of the search, either up = 1, or down = 0. 12 wrap wrap/halt. determines whether the seek should wrap = 1, or halt = 0 when it hits the band limit. 1 1:0 reserved always write to 0. bit d7d6d5d4d3d2d1d0 status cts err x x rsqint rdsint x stcint
an332 rev. 1.0 73 command 0x22. fm_tune_status returns the status of fm_tune_f req or fm_seek_start commands. th e command return s the current frequency, rssi, snr, multipath, and the antenna t uning capacitance value (0-191). the command clears the stcint interrupt bit when inta ck bit of arg1 is set. the cts bit (and opt ional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. available in: all command arguments: one response bytes: seven command response bit d7d6d5d4d3d2d1d0 cmd 00100010 arg1 000000cancelintack arg bit name function 1 7:2 reserved always write to 0. 11 cancel cancel seek. if set, aborts a seek currently in progress. 10 intack seek/tune interrupt clear. if set, clears the seek/tune comp lete interrupt st atus indicator. bitd7d6d5d4d3d2d1d0 status cts err x x rsqint rdsint x stcint resp1 bltfxxxxxafcrlvalid resp2 readfreq h [7:0] resp3 readfreq l [7:0] resp4 rssi[7:0] resp5 snr[7:0] resp6 mult[7:0] resp7 readantcap[7:0] (si4704/05/06/2x only)
an332 74 rev. 1.0 resp bit name function 17 bltf band limit. reports if a seek hit the band limit (wrap = 0 in fm_start_seek) or wrapped to the original frequency (wrap = 1). 1 6:2 reserved always returns 0. 1 1 afcrl afc rail indicator. set if the afc rails. 10 valid valid channel. set if the channel is currently valid as determined by the seek/tune proper- ties (0x1403, 0x1404, 0x1108) and wo uld have been found during a seek. 2 7:0 readfreq h [7:0] read frequency high byte. this byte in combination with readfreq l returns frequency being tuned (10 khz). 3 7:0 readfreq l [7:0] read frequency low byte. this byte in combination with readfreq h returns frequency being tuned (10 khz). 4 7:0 rssi[7:0] received signal strength indicator. this byte contains the receive signal st rength when tune is complete (dbv). 5 7:0 snr[7:0] snr. this byte contains the snr metric when tune is complete (db). 6 7:0 mult[7:0] multipath. this byte contains the multipath metric when tune is complete. multipath indi- cator is available only for si474x, si4706-c30 and later and si4704/05/30/31/34/35/84/85 -d50 and later. 7 7:0 readantcap [7:0] read antenna tuning capacitor (si4704/05/06/2x only) . this byte contains the current antenna tuning capacitor value.
an332 rev. 1.0 75 command 0x23. fm_rsq_status returns status information about the received signal quality. the commands returns the rssi, snr, frequency offset, and stereo blend percentage. it also indicates valid channel (valid), soft mute engagement (smute), and afc rail status (afcrl). this command can be used to ch eck if the received signal is above the rssi high threshold as reported by rssihint, or below the rssi low threshold as report ed by rssilint. it can also be used to check if the signal is above the snr high threshold as reported by snrhint, or below the snr low threshold as reported by snrlint. for the si4706/4x , it can be used to check if the detected multipath is above the multipath high threshold as reported by multhint, or below the mu ltipath low threshold as reported by multlint. if the pilot indicator is set, it can also check whether the blend has crossed a threshold as indicated by blendint. the command clears the rsqint, blendint, snrhin t, snrlint, rssihint, rssilint, multhint, and multlint interrupt bits when intack bit of arg1 is set. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. available in: all command arguments: one response bytes: seven command response bit d7d6d5d4d3d2d1d0 cmd 00100011 arg1 0000000intack arg bit name function 10 intack interrupt acknowledge. 0 = interrupt status preserved. 1 = clears rsqint, blendint, snrhint, snrlint, rssihint, rssilint, multhint, multlint. bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint rdsint x stcint resp1 blendint x multhint multlint snrhint snrlint rssihint rssiilint resp2 x x x x smute x afcrl valid resp3 pilot stblend[6:0] resp4 rssi[7:0] resp5 snr[7:0] resp6 mult[7:0] resp7 freqoff[7:0]
an332 76 rev. 1.0 resp bit name function 1 7 blendint blend detect interrupt. 0 = blend is within the blend threshold settings. 1 = blend goes above or below the blend threshold settings. 15multhint multipath detect high (si474x, si4706-c30 and later and si4704/05/30/31/34/35/84/85-d50 and later only). 0 = detected multipath value has not exceeded above the multipath high threshold. 1 = detected multipath value has exceeded above the multipath high threshold. 14multlint multipath detect low (si474x, si4706-c30 and later and si4704/05/30/31/34/35/84/85-d50 and later only). 0 = detected multipath value has not fallen below the multipath low threshold. 1 = detected multipath value has fallen below the multipath low threshold. 1 3 snrhint snr detect high. 0 = received snr has not exceeded above snr high threshold. 1 = received snr has exceeded above snr high threshold. 12 snrlint snr detect low. 0 = received snr has not fallen below snr low threshold. 1 = received snr has fallen below snr low threshold. 1 1 rssihint rssi detect high. 0 = rssi has not exceeded above rssi high threshold. 1 = rssi has exceeded above rssi high threshold. 1 0 rssilint rssi detect low. 0 = rssi has not fallen be low rssi low threshold. 1 = rssi has fallen below rssi low threshold. 23 smute soft mute indicator. indicates soft mute is engaged. 21 afcrl afc rail indicator. set if the afc rails. 20 valid valid channel. set if the channel is currently valid an d would have been found during a seek. 37 pilot pilot indicator. indicates stereo pilot presence. 3 6:0 stblend[6:0] stereo blend indicator. indicates amount of stereo blend in% (100 = full stereo, 0 = full mono). 4 7:0 rssi[7:0] received signal strength indicator. contains the current receive signal strength (0?127 dbv). 5 7:0 snr[7:0] snr. contains the current snr metric (0?127 db). 6 7:0 mult[7:0] multipath (si474x, si4706-c30 and late r and si4704/05/30/3 1/34/35/84/85-d50 and later only). contains the current multipath metric . (0 = no multipath; 100 = full multipath) 7 7:0 freqoff[7:0] frequency offset. signed frequency offset (khz).
an332 rev. 1.0 77 command 0x24. fm_rds_status returns rds information for current channel and reads an entry from the rds fifo. rds information includes synch status, fifo status, group data (blocks a, b, c, and d), and block er rors corrected. this command clears the rdsint interrupt bit when intack bit in arg1 is set and, if mtfifo is set, th e entire rds receive fifo is cleared (fifo is always cleared during fm_tune_freq or fm_seek_start). the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in power up mode. the fifo size is 25 groups for fmrx compon ent 2.0 or later, and 14 for fmrx component 1.0. notes: 1. fm_rds_status is supported in fmrx component 2.0 or later. 2. mtfifo is not supported in fmrx component 2.0. available in: si4705/06, si4721, si474x, si4731/35/37/39, si4785 command arguments: one response bytes: twelve command response bit d7 d6 d5 d4 d3 d2 d1 d0 cmd 0 0 1 0 0 1 0 0 arg1 0 0 0 0 0 statusonly mtfifo intack arg bit name function 12statusonly status only. determines if data should be removed from the rds fifo. 0 = data in blocka, blockb, blockc, blockd, and ble contain the oldest data in the rds fifo. 1 = data in blocka will contain the last va lid block a data received for the cur- rent station. data in blockb will contain the last valid block b data received for the current station. data in ble will describe the bi t errors for the data in blocka and blockb. 1 1 mtfifo empty fifo 0 = if fifo not empty, read and remove oldest fifo entry. 1 = clear rds receive fifo. 10 intack interrupt acknowledge 0 = rdsint status preserved. 1 = clears rdsint. bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint rdsint x stcint resp1 x x rdsnewblockb rdsnewblocka x rdssyncfound rdssynclost rdsrecv resp2 x x x x x grplost x rdssync
an332 78 rev. 1.0 resp3 rdsfifoused[7:0] resp4 blocka[15:8] resp5 blocka[7:0] resp6 blockb[15:8] resp7 blockb[7:0] resp8 blockc[15:8] resp9 blockc[7:0] resp10 blockd[15:8] resp11 blockd[7:0] resp12 blea[1:0] bleb[1:0] blec[1:0] bled[1:0] resp bit name function 1 5 rdsnewblockb rds new block b. 1 = valid block b data has been received. 1 4 rdsnewblocka rds new block a. 1 = valid block a data has been received. 1 2 rdssyncfound rds sync found. 1 = found rds synchronization. 1 1 rdssynclost rds sync lost. 1 = lost rds synchronization. 1 0 rdsrecv rds received. 1 = fifo filled to mini mum number of groups set by rdsfifocnt. 22 grplost group lost. 1 = one or more rds groups discarded due to fifo overrun. 2 0 rdssync rds sync. 1 = rds currently synchronized. 3 7:0 rdsfifoused rds fifo used. number of groups remaining in the rds fifo (0 if empty). if non-zero, blocka-blockd contain the oldest fifo entry and rdsfifoused decre- ments by one on the next call to rds_fifo_status (assuming no rds data received in the interim). 4 7:0 blocka[15:8] rds block a. block a group data from oldest fifo entry if statusonly is 0. last valid block a data if statusonly is 1 (si4749, si4706-c30 and later and si4705/31/35/85-d50 and later only). 5 7:0 blocka[7:0] 6 7:0 blockb[15:8] rds block b. block b group data from oldest fifo entry if statusonly is 0. last valid block b data if statusonly is 1 (si4749, si4706-c30 and later and si4705/31/35/85-d50 and later only). 7 7:0 blockb[7:0] 8 7:0 blockc[15:8] rds block c. block c group data from oldest fifo entry. 9 7:0 blockc[7:0] bit d7 d6 d5 d4 d3 d2 d1 d0
an332 rev. 1.0 79 10 7:0 blockd[15:8] rds block d. block d group data from oldest fifo entry. 11 7:0 blockd[7:0] 12 7:6 blea[1:0] rds block a corrected errors. 0 = no errors. 1 = 1?2 bit errors detected and corrected. 2 = 3?5 bit errors detected and corrected. 3 = uncorrectable. 12 5:4 bleb[1:0] rds block b corrected errors. 0 = no errors. 1 = 1?2 bit errors detected and corrected. 2 = 3?5 bit errors detected and corrected. 3 = uncorrectable. 12 3:2 blec[1:0] rds block c corrected errors. 0 = no errors. 1 = 1?2 bit errors detected and corrected. 2 = 3?5 bit errors detected and corrected. 3 = uncorrectable. 12 1:0 bled[1:0] rds block d corrected errors. 0 = no errors. 1 = 1?2 bit errors detected and corrected. 2 = 3?5 bit errors detected and corrected. 3 = uncorrectable. resp bit name function
an332 80 rev. 1.0 command 0x27. fm_agc_status returns the agc setting of the device. the command re turns whether the agc is enabled or disabled and it returns the lna gain index. this command may only be sent when in powerup mode. available in: all command arguments: none response bytes: two command response bitd7d6d5d4d3d2d1d0 cmd 00100111 bitd7d6d5d4d3d2d1d0 status cts err x x rsqint rdsint x stcint resp1 xxxxxxx read_rf- agcdis resp2 x x x read_lna_gain_index[4:0] resp bit name function 1 0 read_rfagcdis this bit indicates whether the rf agc is disabled or not 0 = rf agc is enabled 1 = rf agc is disabled 2 4:0 read_lna_gain_index these bits returns the value of the lna gain index 0 = minimum attenuation (max gain) 1 ? 25 = intermediate attenuation 26 = maximum attenuation (min gain) note: the max index is subject to change
an332 rev. 1.0 81 command 0x28. fm_agc_override overrides agc setting by disabling the agc and forcing the lna to have a certain gain that ranges between 0 (minimum attenuation) and 26 (maximum attenuation). this command may only be sent when in powerup mode. available in: all command arguments: two response bytes: none command response bit d7d6d5d4d3d2d1 d0 cmd 0010100 0 arg1 xxxxxxxrfagcdis arg2 x x x lna_gain_index[4:0] arg bit name function 10 rfagcdis this bit selects whether the rf agc is disabled or not 0 = rf agc is enabled 1 = rf agc is disabled 2 4:0 lna_gain_index these bits set the value of the lna gain index 0 = minimum attenuation (max gain) 1 ? 25 = intermediate attenuation 26 = maximum attenuation (min gain) note: the max index is subject to change bitd7d6d5d4d3d2d1d0 status cts err x x rsqint rdsint x stcint
an332 82 rev. 1.0 command 0x80. gpio_ctl enables output for gpo1, 2, and 3. gpo1, 2, and 3 can be configured for output (hi-z or active drive) by setting the gpo1oen, gpo2oen, and gpo3oen bit. the state (h igh or low) of gpo1, 2, and 3 is set with the gpio_set command. to avoid excessive current consumption due to oscillation , gpo pins should not be left in a high impedance state. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. the default is all gpo pins set for high impedance. notes: 1. gpio_ctl is fully supported in fmrx component 2.0 or late r. only bit gpo3oen is suppo rted in fmrx component 1.0. 2. the use of gpo2 as an interrupt pin and /or the use of gpo3 as dclk digital clock input will override this gpio_ctl function for gpo2 and/or gpo3 respectively. available in: all except si4710-a10 command arguments: one response bytes: none command response bitd7d6d5d4d3d2d1d0 cmd 10000000 arg1 0 0 0 0 gpo3oen gpo2oen gpo1oen 0 arg bit name function 1 7:4 reserved always write 0. 1 3 gpo3oen gpo3 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 2 gpo2oen gpo2 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 1 gpo1oen gpo1 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 0 reserved always write 0. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 rev. 1.0 83 command 0x81. gpio_set sets the output level (high or low) for gpo1, 2, and 3. gp o1, 2, and 3 can be configured for output by setting the gpo1oen, gpo2oen, and gpo3oen bit in the gpio_ctl command. to avoid excessive current consumption due to oscillation, gpo pins should not be left in a high impedance state. the cts bit (and optional interrupt) is set when it is safe to send the next command. this prop erty may only be set or read when in powerup mode. the default is all gpo pins set for high impedance. note: gpio_set is fully-supported in fmrx component 2.0 or la ter. only bit gpo3level is supported in fmrx component 1.0. available in: all except si4710-a10 command arguments: one response bytes: none command response bit d7 d6d5d4 d3 d2 d1 d0 cmd 10000001 arg1 0 0 0 0 gpo3level gpo2level gpo1level 0 arg bit name function 1 7:4 reserved always write 0. 1 3 gpo3level gpo3 output level. 0 = output low (default). 1 = output high. 1 2 gpo2level gpo2 output level. 0 = output low (default). 1 = output high. 1 1 gpo1level gpo1 output level. 0 = output low (default). 1 = output high. 1 0 reserved always write 0. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 84 rev. 1.0 5.2.2. fm/rds receiver properties property 0x0001. gpo_ien configures the sources for the gpo2/int interrupt pin. valid sources are the lower 8 bits of the status byte, including cts, err, rsqint, rdsint (si4705/21/31/ 35/37/39/41/43/45/85 only ), and stcint bits. the corresponding bit is set before the interrupt occurs. the ct s bit (and optional interrupt) is set when it is safe to send the next command. the cts interrupt enable (ctsie n) can be set with this property and the power_up command. the state of the ctsien bit set during the power_up command can be read by reading this property and modified by writing this property. this propert y may only be set or read when in powerup mode. errata: rsqien is non-functional on fmrx component 2.0. available in: all default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 rsqrep rdsrep 0 stcrep ctsien errien 0 0 rsqien rdsien 0 stcien bit name function 15:12 reserved always write to 0. 11 rsqrep rsq interrupt repeat. 0 = no interrupt generated when rs qint is already set (default). 1 = interrupt generated even if rsqint is already set. 10 rdsrep rds interrupt repeat (si4705/21/31 /35/37/39/41/43/ 45/85-c40 only). 0 = no interrupt generated when rdsint is already set (default). 1 = interrupt generated even if rdsint is already set. 9 reserved always write to 0. 8 stcrep stc interrupt repeat. 0 = no interrupt generated when stcint is already set (default). 1 = interrupt generated even if stcint is already set. 7ctsien cts interrupt enable. after po werup, this bit reflects the ctsien bit in arg1 of powerup command. 0 = no interrupt generated when cts is set. 1 = interrupt generated when cts is set. 6errien err interrupt enable. 0 = no interrupt generated when err is set (default). 1 = interrupt generated when err is set. 5:4 reserved always write to 0. 3rsqien rsq interrupt enable. 0 = no interrupt generated when rsqint is set (default). 1 = interrupt generated when rsqint is set. 2rdsien rds interrupt enable (si4705/21/31 /35/37/39/41/43/45/85-c40 only). 0 = no interrupt generated when rdsint is set (default). 1 = interrupt generated when rdsint is set. 1 reserved always write to 0. 0stcien seek/tune complete interrupt enable. 0 = no interrupt generated when stcint is set (default). 1 = interrupt generated when stcint is set.
an332 rev. 1.0 85 property 0x0102. digital_output_format configures the digital audio output format. configuration options include dclk edge, data format, force mono, and sample precision. available in: si4705/06, si4721/31/35/37/39, si4730/ 34/36/38-d60 and later, si4741/43/45, si4784/85 default: 0x0000 note: digital_output_format is supported in fm receive component 2.0 or later. bit 15141312111098 7 6543 2 1 0 name 00000000ofall omode[3:0] omono osize[1:0] bit name function 15:8 reserved always write to 0. 7ofall digital output dclk edge. 0 = use dclk rising edge 1 = use dclk falling edge 6:3 omode[3:0] digital output mode. 0000 = i 2 s 0110 = left-justified 1000 = msb at second dclk after dfs pulse 1100 = msb at first dclk after dfs pulse 2omono digital output mono mode. 0 = use mono/stereo blend (per blend thresholds) 1 = force mono 1:0 osize[1:0] digital output audio sample precision. 0 = 16-bits 1 = 20-bits 2 = 24-bits 3=8-bits
an332 86 rev. 1.0 property 0x0104. digital_output_sample_rate enables digital audio output and configures digital audio output sample rate in samples per second (sps). when dosr[15:0] is 0, digital audio output is disabled. the over-sampling rate must be set in order to satisfy a minimum dclk of 1 mhz. to enable digital audio output, program dosr[15:0] with the sample rate in samples per second. the system controller must establish dclk and dfs prior to enabling the digital audio output else the device will not respond and will require reset. the sample rate must be set to 0 before the dclk/dfs is removed. fm_tune_freq command must be sent after the power_up command to start the internal clocking before setting this property. note: digital_ouptut_sample_rate is supported in fm receive component 2.0 or later. available in: si4705/06, si4721/31/35/37/39, si4730/ 34/36/38-d60 and later, si4741/43/45, si4784/85 default: 0x0000 (digital audio output disabled) units: sps range: 32?48 ksps, 0 to disable digital audio output bit 1514131211109876543210 name dosr[15:0] bit name function 15:0 dosr[15:0] digital output sample rate. 32?48 ksps. 0 to disable digital audio output.
an332 rev. 1.0 87 property 0x0201. refclk_freq sets the frequency of the refclk from the output of the prescaler. the refclk range is 31130 to 34406 hz (32768 5% hz) in 1 hz steps, or 0 (to disable afc). fo r example, an rclk of 13 mhz would require a prescaler value of 400 to divide it to 32500 hz refclk. the refer ence clock frequency property would then need to be set to 32500 hz. rclk frequencies between 31130 hz and 40 mhz are supported, however, t here are gaps in frequency coverage for prescaler values ranging from 1 to 10, or frequencies up to 311300 hz. the following table summarizes these rclk gaps. figure 2. refclk prescaler the rclk must be valid 10 ns before sending and 20 ns after completing the fm_tune_freq and fm_seek_start commands. in add ition, the rclk must be valid at all times for proper afc operation. the rclk may be removed or reconfigured at other times. the cts bi t (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 32768 hz. available in: all default: 0x8000 (32768) units: 1 hz step: 1 hz range: 31130?34406 table 11. rclk gaps prescaler rclk low (hz) rclk high (hz) 1 31130 34406 2 62260 68812 3 93390 103218 4 124520 137624 5 155650 172030 6 186780 206436 7 217910 240842 8 249040 275248 9 280170 309654 10 311300 344060 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name refclkf[15:0] bit name function 15:0 refclkf[15:0] frequency of reference clock in hz. the allowed refclk frequency range is between 31130 and 34406 hz (32768 5%), or 0 (to disable afc). rclk refclk pin 9 prescaler divide by 1-4095 31.130 khz ? 40 mhz 31.130 khz ? 34.406 khz
an332 88 rev. 1.0 property 0x0202. refclk_prescale sets the number used by the prescaler to divide the exte rnal rclk down to the internal refclk. the range may be between 1 and 4095 in 1 unit steps. for example, an rclk of 13 mhz would require a prescaler value of 400 to divide it to 32500 hz. the reference clock frequency property would then need to be set to 32500 hz. the rclk must be valid 10 ns before sending and 20 ns after completing the fm_tune_freq and fm_tune_start commands. in addition, the rclk must be valid at all times for proper afc operation. the rclk may be removed or reconfigured at other times. the cts bit (and optional inte rrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 1. available in: all default: 0x0001 step: 1 range: 1?4095 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000 rclk sel refclkp[11:0] bit name function 15:13 reserved always write to 0. 12 rclksel rclksel. 0 = rclk pin is clock source. 1 = dclk pin is clock source. 11:0 refclkp[11:0] prescaler for reference clock. integer number used to divide clock frequency down to refclk frequency. the allowed refclk frequency range is betw een 31130 and 34406 hz (32768 5%), or 0 (to disable afc).
an332 rev. 1.0 89 property 0x1100. fm_deemphasis sets the fm receive de-emphasis to 50 or 75 s. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 75 s. available in: all except si4749 default: 0x0002 property 0x1102. fm_channel_filter selects bandwidth of channel filter applied at the demodu lation stage. default is auto matic which means the device automatically selects proper channel filter. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 1. available in: si4706, si4749, si4704 /05/30/31/34/35/84 /85-d50 and later default: 0x0001 (si4706, si4749, si4705/31/35/85-d50 and later) 0x0000 (si4704/30/34/84-d50 and later) range: 0?4 note: automatic channel filter setting is not supported in fmrx component 3.0. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2 d1 d0 name 00000000000000deemph[1:0] bit name function 15:2 reserved always write to 0. 1:0 deemph[1:0] fm de-emphasis. 10 = 75 s. used in usa (default) 01 = 50 s. used in europe, australia, japan 00 = reserved 11 = reserved bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name fmchfilt[15:0] bit name function 15:0 fm_channel_filter 0 = automatically select proper channel filter. 1 = force wide (110 khz) channel filter. 2 = force narrow (84 k hz) channel filter. 3 = force narrower (60 k hz) channel filter. 4 = force narrowest (40 khz) channel filter.
an332 90 rev. 1.0 property 0x1105. fm_b lend_stereo_threshold sets rssi threshold for stereo blend (full stereo above th reshold, blend below threshold). to force stereo, set this to 0. to force mono, set this to 127. the cts bit (and op tional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 49 dbv. available in: si470x/2x, si473x-c40 and earlier default: 0x0031 units: dbv step: 1 range: 0?127 property 0x1106. fm_blend_mono_threshold sets rssi threshold for mono blend (full mono below thre shold, blend above threshold). to force stereo, set this to 0. to force mono, set this to 127. the cts bit (and op tional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 30 dbv. available in: si470x/2x, si473x-c40 and earlier default: 0x001e units: dbv step: 1 range: 0?127 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000 stthresh[6:0] bit name function 15:7 reserved always write to 0. 6:0 stthresh fm blend stereo threshold. rssi threshold below which the audio output goes into a blend mode. above this threshold the audio output is in full stereo. specified in units of dbv in 1 db steps (0?127). default is 49 dbv. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000 monothresh[6:0] bit name function 15:7 reserved always write to 0. 6:0 monothresh fm blend mono threshold. rssi threshold below which the audio output goes into full mono mode. above this threshold the audio output is in blend or full stereo. specified in units of dbv in 1 db steps (0?127). default is 30 dbv.
an332 rev. 1.0 91 property 0x1107. fm_antenna_input selects what type of antenna and what pin it is connec ted to. default is 0 which means the antenna used is a headphone (long) antenna and it is connected to the fm i pin. setting the fmtxo bit to 1 means that the antenna used is an embedded (short) antenna and it is connected to the txo/lpi pin. note: to assure proper tuning, the fm_tune_freq command shou ld be issued immediately after this property is changed. available in: si4704/05/06/20/21 default: 0x0000 property 0x1108. fm_max_tune_error sets the maximum freq error allowed before setting the afc rail indicator (afcrl). the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 20 khz. note: for fmrx components 2.0 or earlier, the default is set to 30 khz. for best seek perf ormance, set fm_max_tune_er- ror to 20 khz. available in: all default: 0x001e (si473x-b20 and earlier) 0x0014 (all others) units: khz step: 1 range: 0?255 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1 d0 name 000000000000000fmtxo bit name function 15:1 reserved always write to 0 0fmtxo selects what type of antenna and which pin it is connected to: 0 = use fmi pin for headphone (long) antenna 1 = use txo/lpi pin for embedded (short) antenna bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 00000000 fmmaxtuneerr[7:0] bit name function 15:8 reserved always write to 0. 7:0 fmmaxtuneerr fm maximum tuning frequency error. maximum tuning error allowed before setting the afc rail indicator on. specified in units of khz. default is 20 khz.
an332 92 rev. 1.0 property 0x1200. fm_rsq_int_source configures interrupt related to received signal quality metr ics. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 0. available in: all default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0000000 blen- dien 0 mult hien mult- lien snrhien snrlien rssihien rssilien bit name function 15:8 reserved always write to 0. 7blendien interrupt source enable: blend. enable blend as the source of interrup t which the threshold is set by fm_r- sq_blend_threshold. 6 reserved always write to 0. 5multhien interrupt source enable: multipath high (si4706-c30 and later, si474x and si4704/05/30/31/34/35/84/85-d50 and later only). enable multipath high as the source of inte rrupt which the threshold is set by fm_rsq_- multipath_hi_threshold. 4multlien interrupt source enable: multipath low (si4706-c30 and later, si474x and si4704/05/30/31/34/35/84/85-d50 and later only). enable multipath low as the source of inte rrupt which the threshold is set by fm_rsq_- multipath_lo_threshold. 3 snrhien interrupt source enable: snr high. enable snr high as the sour ce of interrupt which the threshold is set by fm_rsq_sn- r_hi_threshold. 2snrlien interrupt source enable: snr low. enable snr low as the as the source of in terrupt which the threshold is set by fm_r- sq_snr_lo_threshold. 1 rssihien interrupt source enable: rssi high. enable rssi high as the source of inte rrupt which the threshold is set by fm_r- sq_rssi_hi_threshold. 0 rssilien interrupt source enable: rssi low. enable rssi low as the source of interr upt which the threshold is set by fm_r- sq_rssi_lo_threshold.
an332 rev. 1.0 93 property 0x1201. fm_rsq_snr_hi_threshold sets high threshold which triggers the rsq interrupt if the snr is above this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 127db. available in: all default: 0x007f units: db step: 1 range: 0?127 property 0x1202. fm_rsq_snr_lo_threshold sets low threshold whic h triggers the rsq interrupt if the snr is be low this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 0 db. available in: all default: 0x0000 units: db step: 1 range: 0?127 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 0 0 0 0 0 0 0 0 snrh[6:0] bit name function 15:7 reserved always write to 0. 6:0 snrh fm rsq snr high threshold. threshold which triggers the rs q interrupt if the snr is above this threshold. specified in units of db in 1 db steps (0?127). default is 127 db. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000 snrl[6:0] bit name function 15:7 reserved always write to 0. 6:0 snrl fm rsq snr low threshold. threshold which triggers the rsq interrupt if the snr is below this threshold. specified in units of db in 1 db steps (0?127). default is 0 db.
an332 94 rev. 1.0 property 0x1203. fm_rsq_rssi_hi_threshold sets high threshold which triggers the rsq interrupt if the rssi is above this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 127 dbv. available in: all default: 0x007f units: dbv step: 1 range: 0?127 property 0x1204. fm_rsq_rssi_lo_threshold sets low threshold which triggers the rsq interrupt if the rssi is below this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 0 dbv. available in: all default: 0x0000 units: dbv step: 1 range: 0?127 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000 rssih[6:0] bit name function 15:7 reserved always write to 0. 6:0 rssih fm rsq rssi high threshold. threshold which triggers the rsq interrupt if th e rssi is above this threshold. specified in units of dbv in 1 db steps (0?127). default is 127 dbv. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000 rssil[6:0] bit name function 15:7 reserved always write to 0. 6:0 rssil fm rsq rssi low threshold. threshold which triggers the rsq interrupt if the rssi is below this threshold. specified in units of dbv in 1 db steps (0?127). default is 0 dbv.
an332 rev. 1.0 95 property 0x1205. fm_rsq_multipath_hi_threshold sets the high threshold which triggers the rsq interrupt if the multipath level is above this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in power up mode. the value may be the threshold multipath percent (0?100), or 127 to disable the feature. available in: si4706-c30 and later, si474x, si4704/05/30/31/34/35/ 84/85-d50 and later default: 0x007f step: 1 range: 0?127 property 0x1206. fm_rsq_multipath_lo_threshold sets the low threshold which triggers the rsq interrupt if the multipath level is below this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in power up mode. the default is 0. available in: si4706-c30 and later, si474x, si4704/05/30/31/34/35/ 84/85-d50 and later default: 0x0000 step: 1 range: 0?127 bit d15d14 d13 d12 d11 d10 d9 d8 d7d6d5d4d3d2d1d0 name 0 0 0 0 0 0 0 0 0 multh[6:0] bit name function 15:7 reserved always write to 0. 6:0 multh fm rsq multipath high threshold. threshold which triggers the rsq interrupt if the multipath is above this threshold. default is 127. bit d15 d14 d13 d12 d11 d10d9d8d7d6d5d4d3d2d1d0 name 0 00000000 multl[6:0] bit name function 15:7 reserved always write to 0 6:0 multl fm rsq multipath low threshold. threshold which triggers the rsq interrupt if the multipath is be low this threshold. default is 0.
an332 96 rev. 1.0 property 0x1207. fm_rsq_blend_threshold sets the blend threshold for blend interrupt when boundary is crossed. the cts bit (and optional interrupt) is set when it is safe to send the next command. this prop erty may only be set or read when in powerup mode. the default is 1%. available in: all except si4749 default: 0x0081 units: % step: 1 range: 0?100 property 0x1300. fm_soft_mute_rate sets the attack and decay rates when entering and leaving soft mute. later values increase rates, and lower values decrease rates. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 0x0040. available in: si4706/07/20/21/84/85-b20 an d earlier, si4704/05/3x-c40 and earlier default: 64 step: 1 range: 1?255 bit d15d14d13d12d11d10d9 d8 d7 d6d5d4d3d2d1d0 name 00000000pilot blend[6:0] bit name function 15:8 reserved always write to 0. 7pilot pilot indicator. this bit has to be set to 1 (there has to be a pilot present) in order for fm_r- sq_blend_threshold to trigger an interrupt. without a pilot tone, the part is always in full mono mode and never goes into blend. 6:0 blend fm rsq blend threshold. this is a boundary cross threshold. if the bl end cross from above to below, or the other way around from below to above this th reshold, it will trigger an interrupt. specified in units of % in 1% steps (0?100). default is 1%. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 00000000 smrate[7:0]
an332 rev. 1.0 97 property 0x1301. fm_soft_mute_slope configures attenuation slope during soft mute in db attenuation per db snr below the soft mute snr threshold. soft mute attenuation is the minimum of smslope x (smthr ? snr) and smattn. the recommended smslope value is ceiling(smattn/smthr) . smattn and smthr are set via the fm_soft_mute_max_attenuation and fm_soft_mu te_snr_threshold properties. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in power up mode. the default soft mute slope pr operty setting is 2 db/db in supported devices. the soft mute slope is not configurable in si4704/05/3x-b20 device s (those with fmrx component 2.0) and is 2 db/db. the soft mute slope is not configurable in si4710/20-a10 devices (those with fmrx component 1.0), and is 0 db/db (disabled). available in: si4704/05/06/3x-c40 and later, si4740/41/42/43/44/45 default: 0x0002 range: 0?63 property 0x1302. fm_soft_mute_max_attenuation sets maximum attenuation during soft mute (db). set to 0 to disable soft mute. the cts bit (and optional interrupt) is set when it is safe to send the next command. this pr operty may only be set or read when in powerup mode. the default is 16 db. available in: all except si4749 default: 0x0010 units: db step: 1 range: 0?31 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 00000000 smslope[7:0] bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 00000000000 smattn[4:0] bit name function 15:5 reserved always write to 0. 4:0 smattn fm soft mute maximum attenuation. set maximum attenuation during soft mute. if se t to 0, then soft mute is disabled. speci- fied in units of db in 1 db steps (0?31). default is 16 db.
an332 98 rev. 1.0 property 0x1303. fm_soft_mute_snr_threshold sets snr threshold to engage soft mute. whenever the s nr for a tuned frequency drops below this threshold, the fm reception will go in so ft mute, provided soft mute max attenuat ion property is non-zero. the cts bit (and optional interrupt) is set when it is sa fe to send the next command. this property may only be set or read when in powerup mode. the default is 4 db. available in: all except si4749 default: 0x0004 units: db step: 1 range: 0?15 property 0x1304. fm_soft_mute_release_rate sets the soft mute release rate. smaller values provide slower release and larger values provide faster release. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 8192 (approximately 8000 db/s). release rate (db/s) = release[14:0]/1.024 available in: si4706-c30 and later, si4740/41/42/43/ 44/45, si4704/05/30/31/34 /35/84/85-d50 and later default: 0x2000 range: 1?32767 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000000 smthr[3:0] bit name function 15:4 reserved always write to 0. 3:0 smthr fm soft mute snr threshold. threshold which will engage soft mute if the sn r falls below this. specified in units of db in 1 db steps (0?15). default is 4 db. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 release[14:0]
an332 rev. 1.0 99 property 0x1305. fm_soft_mute_attack_rate sets the soft mute attack rate. smaller values provide sl ower attack and larger values provide faster attack. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the defaul t is 8192 (approximately 8000 db/s). attack rate (db/s) = attack[14:0]/1.024 available in: si4706-c30 and later, si4740/41/42/43/ 44/45, si4704/05/30/31/34 /35/84/85-d50 and later default: 0x2000 range: 1?32767 figure 3. softmute gain (db) bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 attack[14:0] softmute gain (db) -18 -16 -14 -12 -10 -8 -6 -4 -2 0 0123456789101112131415 snr (db) x=2, y=16, z=4 (default) x=4, y=16, z=4 x=2, y=4, z=4 x=2, y=16, z=13 x = 0x1301: fm_soft_mute_slope (0-63 db/db) y = 0x1302: fm_soft_mute_max_attenuation (0-31 db) z = 0x1303: fm_soft_mute_snr_threshold (0-15 db)
an332 100 rev. 1.0 property 0x1400. fm_seek_band_bottom sets the bottom of the fm band for seek. the cts bit (and opt ional interrupt) is set when it is safe to send the next command. this property may only be set or re ad when in powerup mode. the default is 87.5 mhz. available in: all default: 0x222e units: 10 khz step: 50 khz range: 64?108 mhz note: for fmrx components 2.0 or earlier, range is 76?108 mhz. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name fmskfreql[15:0] bit name function 15:0 fmskfreql fm seek band bottom frequency. selects the bottom of the fm band during seek . specified in units of 10 khz. default is 8750 (87.5 mhz).
an332 rev. 1.0 101 property 0x1401. fm_seek_band_top sets the top of the fm band for seek. the cts bit (and opti onal interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 107.9 mhz. available in: all default: 0x2a26 units: 10 khz step: 50 khz range: 64?108 mhz note: for fmrx components 2.0 or earlier, range is 76?108 mhz. property 0x1402. fm_seek_freq_spacing selects frequency spacing for fm seek. there are only 3 valid values: 5, 10, and 20. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 100 khz. available in: all default: 0x000a bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name fmskfreqh[15:0] bit name function 15:0 fmskfreqh fm seek band top frequency. selects the top of the fm band during seek. specified in units of 10 khz. default is 10790 (107.9 mhz). bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 00000000000 skspace[4:0] bit name function 15:5 reserved always write to 0. 4:0 skspace fm seek frequency spacing. selects the frequency spacing during seek fu nction. specified in units of 10 khz. there are only 3 valid values: 5 (50 khz), 10 (1 00 khz), and 20 (200 khz). default is 10.
an332 102 rev. 1.0 property 0x1403. fm_seek_tune_snr_threshold sets the snr threshold for a valid fm seek/tune. the cts bit (and optional interrupt) is se t when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 3 db. available in: all default: 0x0003 units: db step: 1 range: 0?127 property 0x1404. fm_ seek_tune_rssi_threshold sets the rssi threshold for a valid fm seek/tune. the ct s bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 20 dbv. available in: all default: 0x0014 units: dbv step: 1 range: 0?127 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 0 0 0 0 0 0 0 0 sksnr[6:0] bit name function 15:7 reserved always write to 0. 6:0 sksnr fm seek/tune snr threshold. snr threshold which determines if a valid channel has been found during seek/tune. specified in units of db in 1 db steps (0?127). default is 3 db. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000 skrssi[6:0] bit name function 15:7 reserved always write to 0. 6:0 skrssi fm seek/tune received signal strength threshold. rssi threshold which determines if a valid channel has been found during seek/tune. specified in units of dbv in 1 db v steps (0?127). default is 20 dbv.
an332 rev. 1.0 103 property 0x1500. fm_rds_int_source configures interrupt related to rds. the cts bit (and opti onal interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 0. available in: si4705/06, si4721, si4731/35/37/39, si4741/43/45/49 default: 0x0000 property 0x1501. fm_rds_int_fifo_count sets the minimum number of rds groups stored in the rds fifo before rdsrecv is set. the maximum value is 25 for frmx component 2.0 or later, and 14 for fmrx component 1.0. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property ma y only be set or read when in powerup mode. default is 0. note: fm_rds_int_fifo_count is supported in fmrx component 2.0 or later. available in: si4705/06, si4721, si4731/35/37/39, si4741/43/45/49 default: 0x0000 range: 0?25 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 0 rdsnew- blockb rdsnew- blocka 0 rdssync- found rdssyn- clost rdsrecv bit name function 15:6 reserved always write to 0. 5 rdsnewblockb rds new block b found (si4706, si474x, and si4705/31/35/85-d50 and later only) if set, generate an interrupt when block b data is found or subsequently changed. 4 rdsnewblocka rds new block a found (si4706,si474x an d si4705/31/35/85-d50 and later only) if set, generate an interrupt when block a data is found or subsequently changed 3 reserved always write to 0. 2 rdssyncfound rds sync found. if set, generate rdsint when rds gains synchronization. 1 rdssynclost rds sync lost. if set, generate rdsint when rds loses synchronization. 0 rdsrecv rds received. if set, generate rdsint when rds fifo has at least fm_rds_int_fifo_count entries. bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 rdsfifocnt[7:0] bit name function 7:0 rdsfifocnt rds fifo count. minimum number of rds groups stored in the rds fifo before rdsrecv is set.
an332 104 rev. 1.0 property 0x1502. fm_rds_config configures rds settings to enable rds processing (r dsen) and set rds block error thresholds. when a rds group is received, all block errors must be less than or equal the associated block error threshold for the group to be stored in the rds fifo. if blocks with errors are pe rmitted into the fifo, the block error information can be reviewed when the group is read using the fm_rds_sta tus command. the cts bit (and optional interrupt) is set when it is safe to send the next command. this prope rty may only be set or read when in powerup mode. the default is 0x0000. note: fm_rds_config is supported in fmrx component 2.0 or later. available in: si4705/06, si4721, si4731/35/37/39, si4741/43/45/49 default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name bletha[1:0] blethb[1:0] blethc[1:0] blethd[1:0] 0 0 0 0 0 0 0 rdsen bit name function 15:14 bletha[1:0] block error threshold blocka. 0 = no errors. 1 = 1?2 bit errors detected and corrected. 2 = 3?5 bit errors detected and corrected. 3 = uncorrectable. 13:12 blethb[1:0] block error threshold blockb. 0 = no errors. 1 = 1?2 bit errors detected and corrected. 2 = 3?5 bit errors detected and corrected. 3 = uncorrectable. 11:10 blethc[1:0] block error threshold blockc. 0 = no errors. 1 = 1?2 bit errors detected and corrected. 2 = 3?5 bit errors detected and corrected. 3 = uncorrectable. 9:8 blethd[1:0] block error threshold blockd. 0 = no errors. 1 = 1?2 bit errors detected and corrected. 2 = 3?5 bit errors detected and corrected. 3 = uncorrectable. 0 rdsen rds processing enable. 1 = rds processing enabled.
an332 rev. 1.0 105 recommended block error threshold options: 2,2,2,2 = no group stored if any errors are uncorrected. 3,3,3,3 = group stored regardless of errors. 0,0,0,0 = no group stored containing corrected or uncorrected errors. 3,2,3,3 = group stored with corrected errors on b, regardless of errors on a, c, or d. property 0x1503. fm_rds_confidence selects the confidence level requiremen t for each rds block. a higher confidence requirem ent will result in fewer decoder errors (% of blocks with ble<3 that contains inco rrect information) but more block errors (% of blocks with ble=3). the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 0x1111. available in: si4706-c30 and later, si474x, si4704/05/30/31/34/35/ 84/85-d50 and later default: 0x1111 property 0x1700. fm_agc_attack_rate sets the agc attack rate. larger values provide slower attack and smaller values provide faster attack. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 4 (approximately 1500 db/s). nominal ?6000? is based on 50 ? source impedance and will vary with source impedance. in most systems, an exact value is not important. however, to calculate for a different source impedance, perform the following steps: 1. drive antenna input with desired source impedance (via antenna or antenna dummy). 2. increase rf level until agc index changes from 0 to 1. record last rf level with index equal 0. 3. increase rf level until agc index reaches 20. record rf level with index equal 20. 4. replace ?6000? in rate equation with ?(rf20 ? rf0)/0.00667?. available in: si4740/41/42/43/44/45/49 default: 0x0004 step: 4 range: 4?248 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name x x x x confidenceb[3:0] confidencec[3:0] confidenced[3:0] bit name function 11:8 confidenceb selects decoder er ror rate threshold for block b. 7:4 confidencec selects decoder er ror rate threshold for block c. 3:0 confidenced selects decoder er ror rate threshold for block d. agc attack rate (db/s) 6000 attack 7:0 ?? -------------------------------------- - =
an332 106 rev. 1.0 note: was property 0x4100 in fw2.b. property 0x1701. fm_agc_release_rate sets the agc release rate. larger valu es provide slower release and smaller values provide faster release. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 140 (approximately 43 db/s). nominal ?6000? is based on 50 ? source impedance and will vary with source impedance. in most systems, an exact value is not important. however, to calculate for a different source impedance, perform the following steps: 1. drive antenna input with desired source impedance (via antenna or antenna dummy). 2. increase rf level until agc index changes from 0 to 1. record last rf level with index equal 0. 3. increase rf level until agc index reaches 20. record rf level with index equal 20. 4. replace ?6000? in rate equation with ?(rf20 ? rf0)/0.00667?. available in: si4740/41/42/43/44/45/49 default: 0x008c step: 4 range: 4?248 note: was property 0x4101 in fw2.b. property 0x1800. fm_blend_rssi_stereo_threshold sets rssi threshold for stereo blend (full stereo above th reshold, blend below threshold). to force stereo, set to 0. to force mono, set to 127. the cts bit (and optional inte rrupt) is set when it is safe to send the next command. this property may only be set or read w hen in powerup mode. the default is 49 db v. available in: si4706-c30 and later, si4740/41/42/43/ 44/45, si4704/05/30/31/34 /35/84/85-d50 and later default: 0x0031 units: db v step: 1 range: 0?127 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 attack[7:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 release[7:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 strthresh[6:0] agc release rate (db/s) 6000 release 7:0 ?? ------------------------------------------ - =
an332 rev. 1.0 107 property 0x1801. fm_blend_rssi_mono_threshold sets rssi threshold for mono blend (full mono below thre shold, blend above threshold). to force stereo, set this to 0. to force mono, set this to 127. the cts bit (and op tional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 30 db v. available in: si4706-c30 and later, si4740/41/42/43/ 44/45, si4704/05/30/31/34 /35/84/85-d50 and later default: 0x001e units: db v step: 1 range: 0?127 property 0x1802. fm_blend_rssi_attack_rate sets the stereo to mono attack rate for rssi based ble nd. smaller values provide slower attack and larger values provide faster attack. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in poweru p mode. the default is 4000 (approximately 16 ms). attack[15:0] = 65536/time, where time is the desired transition time in ms. available in: si4706-c30 and later, si4740/41/42/43/ 44/45, si4704/05/30/31/34 /35/84/85-d50 and later default: 0x0fa0 step: 1 range: 0 (disabled), 1?32767 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 monothresh[6:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name attack[15:0]
an332 108 rev. 1.0 property 0x1803. fm_blend_rssi_release_rate sets the mono to stereo release rate for rssi based bl end. smaller values provid e slower release and larger values provide faster release. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in po werup mode. the default is 400 (approximately 164 ms). release[15:0] = 65536/time, where time is the desired transition time in ms. available in: si4706-c30 and later, si4740/41/42/43/ 44/45, si4704/05/30/31/34 /35/84/85-d50 and later default: 0x0190 step: 1 range: 0 (disabled), 1?32767 figure 4. rssi blend bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name release[15:0] stereo % 0 10 20 30 40 50 60 70 80 90 100 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 rssi (dbuv) x=49, y=30 (default) x=60, y=30 x=49, y=20 x = 0x1800: fm_blend_r ssi_stereo_threshold (0-127 dbuv) y = 0x1801: fm_blend_rssi_mo no_threshold (0-127 dbuv)
an332 rev. 1.0 109 property 0x1804. fm_blend_snr_stereo_threshold sets snr threshold for stereo blend (full stereo above thre shold, blend below threshold). to force stereo, set this to 0. to force mono, set this to 127. the cts bit (and op tional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 27 db. available in: si4740/41/42/43/44/45, si4704/ 05-d50 and later, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x001b units: db step: 1 range: 0?127 property 0x1805. fm_blend_snr_mono_threshold sets snr threshold for mono blend (full mono below threshold, blend above threshold). to force stereo, set to 0. to force mono, set to 127. the cts bit (and optional interr upt) is set when it is safe to send the next command. this property may only be set or read w hen in powerup mode. the default is 14 db. available in: si4740/41/42/43/44/45, si4704/ 05-d50 and later, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x000e units: db step: 1 range: 0?127 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 strthresh[6:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 monothresh[6:0]
an332 110 rev. 1.0 property 0x1806. fm_blend_snr_attack_rate sets the stereo to mono attack rate for snr based blend. smaller values provide slower attack and larger values provide faster attack. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in poweru p mode. the default is 4000 (approximately 16 ms). attack[15:0] = 65536/time, where time is the desired transition time in ms. available in: si4740/41/42/43/44/45, si4704/ 05-d50 and later, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x0fa0 step: 1 range: 0 (disabled), 1?32767 property 0x1807. fm_blend_snr_release_rate sets the mono to stereo release rate for snr based bl end. smaller values provide slower release and larger values provide faster release. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in po werup mode. the default is 400 (approximately 164 ms). release[15:0] = 65536/time, where time is the desired transition time in ms. available in: si4740/41/42/43/44/45, si4704/ 05-d50 and later, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x0190 step: 1 range: 0 (disabled), 1?32767 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name attack[15:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name release[15:0]
an332 rev. 1.0 111 figure 5. snr blend property 0x1808. fm_blend_multipath_stereo_threshold sets multipath threshold for stereo blend (full stereo below threshold, blend above thre shold). to force stereo, set to 100. to force mono, set to 0. the cts bit (and option al interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 20. available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x0014 step: 1 range: 0?100 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 strthresh[6:0] 0 10 20 30 40 50 60 70 80 90 100 024681012141618202224262830323436384042 snr (db) x=30, y=14 (default) x=40, y=14 x=30, y=20 x = 0x1804: fm_blend_snr_stereo_threshold (0-127 db) y = 0x1805: fm_blend_snr_mono_threshold (0-127 db) stereo %
an332 112 rev. 1.0 property 0x1809. fm_blend_multipath_mono_threshold sets multipath threshold for mono blend (full mono above threshold, blend below threshold). to force stereo, set to 100. to force mono, set to 0. the cts bit (and optional inte rrupt) is set when it is sa fe to send the next command. this property may only be set or read w hen in powerup mode. the default is 60. available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x003c step: 1 range: 0?100 property 0x180a. fm_blend_multipath_attack_rate sets the stereo to mono attack rate for multipath based blend. smaller values provid e slower attack and larger values provide faster attack. the cts bit (and optional inte rrupt) is set when it is safe to send the next command. this property may only be set or read when in po werup mode. the default is 4000 (approximately 16 ms). attack[15:0] = 65536/time, where time is the desired transition time in ms. available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x0fa0 step: 1 range: 0 (disabled), 1?32767 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 monothresh[6:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name attack[15:0]
an332 rev. 1.0 113 property 0x180b. fm_blend_multipath_release_rate sets the mono to stereo release rate for multipath base d blend. smaller values provide slower release and larger values provide faster release. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powe rup mode. the default is 40 (approximately 1.64 s). release[15:0] = 65536/time, where time is the desired transition time in ms. available in: si4740/41/42/43/44/45, si4704/ 05-d50 and later, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x0028 step: 1 range: 0 (disabled), 1?32767 figure 6. mp blend bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name release[15:0] 0 10 20 30 40 50 60 70 80 90 100 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 multipath (%) x=20, y=60 (default) x=30, y=60 x=20, y=80 x = 0x1808: fm_blend_mp_stereo_threshold (0-100 %) y = 0x1809: fm_blend_mp_mono_threshold (0-100 %) stereo %
an332 114 rev. 1.0 property 0x180c. fm_blend_max_stereo_separation sets the maximum allowable stereo separation. the default is 0, disabling the feature so that there is no limit on stereo separation. available in: si474x default: 0x0000 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 0 0 0 0 0 0000000max_sep[2:0] bit name function 15:3 reserved always write to 0. 2:0 max_sep maximum stereo separation. 0 = disabled (default) 1 = 12 db of separation, maximum 2 = 15 db of separation, maximum 3 = 18 db of separation, maximum 4 = 21 db of separation, maximum 5 = 24 db of separation, maximum 6 = 27 db of separation, maximum 7 = 30 db of separation, maximum
an332 rev. 1.0 115 property 0x1900. fm_nb_detect_threshold sets the threshold for detecting impulses in db above the noise floor. the cts bit (and optional interrupt) is set when it is safe to send the next command. this prop erty may only be set or read when in powerup mode. the default is 16 db. to disable the noise blanker featur e, set the fm_nb_detect_threshold property (0x1900) to 0. available in: si4742/43/44/45 default: 0x0010 range: 0?90 note: was property 0x4106 in fw2.b. property 0x1901. fm_nb_interval interval in micro-seconds that original samples are re placed by interpolated clean samples. the cts bit (and optional interrupt) is set when it is sa fe to send the next command. this property may only be set or read when in powerup mode. the default is 24 s. available in: si4742/43/44/45 default: 0x0018 range: 8?48 note: was property 0x4107 in fw2.b. property 0x1902. fm_nb_rate noise blanking rate in 100 hz units. the cts bit (and op tional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 64 (6400 hz). available in: si4742/43/44/45 default: 0x0040 range: 1?64 note: was property 0x4108 in fw2.b. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name nb_detect_threshold [15:0] bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name nb_interval [15:0] bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name nb_rate [15:0]
an332 116 rev. 1.0 property 0x1903. fm_nb_iir_filter sets the bandwidth of the noise floor estimator. the cts bi t (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 300 (465 hz). bandwidth (hz) = nb_iir_filter[15:0] x 1.55 available in: si4742/43/44/45 default: 0x012c range: 300?1600 note: was property 0x4109 in fw2.b. property 0x1904. fm_nb_delay delay in micro-seconds before applying impulse blanking to the original samples. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 170 s. available in: si4742/43/44/45 default: 0x00aa range: 125?219 note: was property 0x410a in fw2.b. bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name nb_iir_filter [15:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name nb_delay [15:0]
an332 rev. 1.0 117 figure 7. fm noise blanker si4742/43 fm impulse noise blanker time time time blanker input blanker output lpf iir output fm_nb_detect_threshold fm_nb_interval fm_nb_rate : sets maximum repeat rate nb is allowed to fire. fm_nb_iir_filter : adjusts lpf fm_nb_delay
an332 118 rev. 1.0 property 0x1a00. fm_hicut_snr_high_threshold sets the snr level at which hi-cut begins to band limit. th e cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be se t or read in powerup mode. the default is 24 db. available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x0018 range: 0?127 note: was property 0x180c in fw2.b. property 0x1a01. fm_hicut_snr_low_threshold sets the snr level at which hi-cut reaches maximum band lim iting. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property ma y only be set or read in powerup mode. the default is 15 db. available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x000f range: 0?127 note: was property 0x180d in fw2.b. property 0x1a02. fm_hicut_attack_rate sets the rate at which hi-cut lowers the transition frequen cy. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read in powerup mode. the default is 20000 (approximately 3 ms). attack[15:0] = 65536/time, were time is the desired transition time in ms. available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x4e20 range: 0 (disabled), 1?32767 note: was property 0x180e in fw2.b. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000 snr_high[6:0] bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000 snr_low[6:0] bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name attack[15:0]
an332 rev. 1.0 119 property 0x1a03. fm_hicut_release_rate sets the rate at which hi-cut increases the transition fre quency. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read in powerup mode. the default is 20 (approximately 3.3 s). release[15:0] = 65536/time, were time is the desired transition time in ms. available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x0014 range: 0 (disabled), 1?32767 note: was property 0x180f in fw2.b. property 0x1a04. fm_hicut_m ultipath_trigger_threshold sets the multipath level at which hi-cut begins to band lim it. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read in powerup mode. the default is 20%. available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x0014 range: 0?100 note: was property 0x1810 in fw2.b. property 0x1a05. fm_hicut_multipath_end_threshold sets the multipath level at which hi-cut reaches maximu m band limiting. the cts bit (and optional interrupt) is set when it is safe to send the next command. this pr operty may only be set or read in powerup mode. the default is 60%. available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default: 0x003c range: 0?100 note: was property 0x1811 in fw2.b. bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name release[15:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 00 00 0 0 000 mult_trigger[6:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0000 0 0 000 mult_end[6:0]
an332 120 rev. 1.0 property 0x1a06. fm_hicut_cutoff_frequency sets the maximum band limit frequency for hi-cut and also sets the maximum audio frequency. the cts bit (optional interrupt) is set when it is safe to send the next command. this property may only be set or read in powerup mode. the default is 0(disabled). available in: si4740/41/42/43/44/45, si4704/05-d50 and la ter, si4706-c30 and later, si4730/31/34/35/84/85-d50 and later default 0x0000 range: 0?7 (maximum band limit frequency for hi-cut) 0?7 (maximum audio frequency) note: was property 0x1812 in fw2.b. the maximum a udio frequency was not programmable in fw2.b. bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 000000000 maximum audio freq[2:0] 0 frequency[2:0] bit name function 6:4 maximum audio frequency[2:0] maximum audio frequency. 0 = maximum audio transition frequency =max audio bw 1 = maximum audio transition frequency = 2 khz 2 = maximum audio transition frequency = 3 khz 3 = maximum audio transition frequency = 4 khz 4 = maximum audio transition frequency = 5 khz 5 = maximum audio transition frequency = 6 khz 6 = maximum audio transition frequency = 8 khz 7 = maximum audio transition frequency = 11 khz 2:0 frequency[2:0] frequency. 0 = hi-cut disabled 1 = hi-cut transition frequency = 2 khz 2 = hi-cut transition frequency = 3 khz 3 = hi-cut transition frequency = 4 khz 4 = hi-cut transition frequency = 5 khz 5 = hi-cut transition frequency = 6 khz 6 = hi-cut transition frequency = 8 khz 7 = hi-cut transition frequency = 11 khz
an332 rev. 1.0 121 figure 8. hicut controlled by snr metric figure 9. hicut controlled by snr metric with maximum audio frequency 8 khz 0 2 4 6 8 10 12 14 16 0 2 4 6 8 10121416182022242628303234363840 snr (db) hi-cut filter transition frequency (khz) w=24, x=15, y=0, z=0 (default) w=24, x=15, y=1, z=0 w=30, x=15, y=1, z=0 w = 0x1a00: fm_hicut_snr_high_threshold (0-127 db) x = 0x1a01: fm_hicut_snr_low_threshold (0-127 db) y = 0x1a06: fm_hicut_cutoff_freq[2:0] (0-7) z = 0x1a06: maximum audio freq[6:4] (0-7) 0 1 2 3 4 5 6 7 8 9 0246810121416182022242628303234363840 snr (db) hi-cut filter transition frequency (khz) w=24, x=15, y=0, z=6 (default) w=24, x=15, y=1, z=6 w=30, x=15, y=1, z=6 w = 0x1a00: fm_hicut_snr_high_threshold (0-127 db) x = 0x1a01: fm_hicut_snr_low_threshold (0-127 db) y = 0x1a06: fm_hicut_cutoff_freq[2:0] (0-7) z = 0x1a06: maximum audio freq[6:4] (0-7)
an332 122 rev. 1.0 figure 10. hicut controlled by multipath metric figure 11. hicut controlled by multipath metric with maximum audio frequency 8 khz 0 2 4 6 8 10 12 14 16 0 102030405060708090100 multipath (%) hi-cut filter transition frequency (khz) w=20, x=60, y=0, z=0 (default) w=20, x=60, y=1, z=0 w=30, x=60, y=1, z=0 w = 0x1a04: fm_hicut_multipath_trigger_threshold (0-100 %) x = 0x1a05: fm_hicut_multipath_end_threshold (0-100 %) y = 0x1a06: fm_hicut_cutoff_freq[2:0] (0-7) z = 0x1a06: maximum audio freq[6:4] (0-7) 0 1 2 3 4 5 6 7 8 9 0 102030405060708090100 multipath (%) hi-cut filter transition frequency (khz) w=20, x=60, y=0, z=6 (default) w=20, x=60, y=1, z=6 w=30, x=60, y=1, z=6 w = 0x1a04: fm_hicut_multipath_trigger_threshold (0-100 %) x = 0x1a05: fm_hicut_multipath_end_threshold (0-100 %) y = 0x1a06: fm_hicut_cutoff_freq[2:0] (0-7) z = 0x1a06: maximum audio freq[6:4] (0-7)
an332 rev. 1.0 123 property 0x4000. rx_volume sets the audio output volume. the cts bit (and optional interr upt) is set when it is safe to send the next command. this property may only be set or read w hen in powerup mode. the default is 63. available in: all except si4749 default: 0x003f step: 1 range: 0?63 property 0x4001. rx_hard_mute mutes the audio output. l and r audio outputs may be muted independently. the cts bit (and optional interrupt) is set when it is safe to send the next command. this prope rty may only be set or read when in powerup mode. the default is unmute (0x0000). available in: all except si4749 default: 0x0000 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0000000000 vol[5:0] bit name function 15:6 reserved always write to 0. 5:0 vol output volume. sets the output volume level, 63 max, 0 min. default is 63. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2 d1 d0 name 00000000 000000lmutermute bit name function 15:2 reserved always write to 0. 1 lmute mutes l audio output. 0 rmute mutes r audio output.
an332 124 rev. 1.0 5.3. commands and properti es for the am/sw/lw receiver (si4730/31/34/35/36/ 37/40/41/42/43/44/45) am (medium wave), sw (short wave), and lw (long wave) use the same am_sw_lw component, thus the commands and properties for these functions are the sa me. for simplicity reason, the commands and properties only have a prefix am instead of am_sw_lw. the main difference among am, sw, and lw is on the frequency range. the common frequency range and spacing for am/sw/lw are: ? sw 2.3 mhz to 23 mhz in 5 khz frequency spacing ? am in us 520 khz to 1.71 mhz in 10 khz frequency spacing ? am in asia 522 khz to 1.71 mhz in 9 khz frequency spacing ? lw 153 khz to 279 khz in 9 khz frequency spacing tables 12 and 13 summarize the commands and properties for the am/sw/lw receiver components applicable to si473x/4x. table 12. am/lw/sw receiver command summary cmd name description available in 0x01 power_up power up device and mode selection. all 0x10 get_rev returns revision information on the device. all 0x11 power_down power down device. all 0x12 set_property sets the value of a property. all 0x13 get_property retrieve s a property?s value. all 0x14 get_int_status read interrupt status bits. all 0x15 patch_args* reserved command used for patch file downloads. all 0x16 patch_data* reserved command used for patch file downloads. all 0x40 am_tune_freq tunes to a given am frequency. all 0x41 am_seek_start begins search ing for a valid frequency. all 0x42 am_tune_status queries the status of the already issued am_tune_freq or am_seek_start command. all 0x43 am_rsq_status queries the status of the received signal quality (rsq) for the current channel. all 0x47 am_agc_status queries the current agc settings. all 0x48 am_agc_override overrides agc settings by disabling and forcing it to a fixed value. all 0x80 gpio_ctl configures gpo1, 2, and 3 as output or hi-z. all 0x81 gpio_set sets gpo1, 2, and 3 output level (low or high). all *note: commands patch_args and patch_data are only used to patch firmware. for information on applying a patch file, see "7.2. powerup from a component patch" on page 216.
an332 rev. 1.0 125 table 13. am/sw/lw receiver property summary prop name description default available in 0x0001 gpo_ien enables interrupt sources. 0x0000 all 0x0102 digital_output_ format configure digital audio outputs 0x0000 si4705/06, si4731/35/37/39, si4730/34/36/38- d60 and later, si4741/43/45, si4784/85 0x0104 digital_output_ sample_rate configure digital audio output sample rate 0x0000 si4705/06, si4731/35/37/39, si4730/34/36/38- d60 and later, si4741/43/45, si4784/85 0x0201 refclk_freq sets frequency of reference clock in hz. the range is 31130 to 34406 hz, or 0 to disable the afc. default is 32768 hz. 0x8000 all 0x0202 refclk_prescale sets the prescaler value for rclk input. 0x0001 all 0x3100 am_deemphasis sets deemphasis time constant. can be set to 50 s. deemphasis is disabled by default. 0x0000 all 0x3102 am_channel_filter 1 selects the bandwidth of the channel filter for am reception. the choices are 6, 4, 3, 2, 2.5, 1.8, or 1 (khz). the default bandwidth is 2 khz. 0x0003 all 0x3103 am_automatic_ volume_control_ max_gain sets the maximum gain for automatic volume control. 0x1543 si473x-c40 and later 0x7800 si474x 0x3104 am_mode_afc_sw_ pull_in_range sets the sw afc pull-in range. 0x21f7 si4734/35-c40 and later, si4742/43/44/45 0x3105 am_mode_afc_sw_ lock_in_range sets the sw afc lock-in. 0x2df5 si4734/35-c40 and later, si4742/43/44/45 0x3200 am_rsq_interrupts configures interrupt related to received signal quality metrics. all interrupts are disabled by default. 0x0000 all 0x3201 am_rsq_snr_high_ threshold sets high threshold for snr interrupt. 0x007f all notes: 1. the 1 khz option, 1.8 khz option, and 100 hz high-pass line no ise rejection filter are suppo rted on si473x-c40 and later devices and si474x devices (am_sw_lw component 3.0 or later). 1. the 2.5 khz option is supported on si473x-c40 and later devices (am_sw_lw component 5.0 or later). 2. component 1.0 incorrectly reports 0x06b 9 (1721 khz) as default for am_seek_ba nd_top. after power_up command is complete, set am_seek_band_top to 0x06ae (1 710 khz) using the set_property command.
an332 126 rev. 1.0 0x3202 am_rsq_snr_low_ threshold sets low threshold for snr interrupt. 0x0000 all 0x3203 am_rsq_rssi_high_ threshold sets high threshold for rssi interrupt. 0x007f all 0x3204 am_rsq_rssi_low_ threshold sets low threshold for rssi interrupt. 0x0000 all 0x3300 am_soft_mute_rate sets the attack and decay rates when entering or leaving soft mute. the default is 278 db/s. 0x0040 all 0x3301 am_soft_mute_ slope sets the am soft mute slope. default value is a slope of 1. 0x0002 si4730/31/34/35/ 36/37-b20 and earlier, si4740/41/42/43/ 44/45-c10 and earlier 0x0001 all others 0x3302 am_soft_mute_max_ attenuation sets maximum attenuation during soft mute (db). set to 0 to disable soft mute. default is 8 db. 0x0010 si4730/31/34/35/ 36/37-b20 and earlier, si4740/41/42/43/ 44/45-c10 and earlier 0x0008 all others 0x3303 am_soft_mute_snr_ threshold sets snr threshold to engage soft mute. default is 8db. 0x000a si4730/31/34/35/ 36/37-b20 and earlier, si4740/41/42/43/ 44/45-c10 and earlier 0x0008 all others 0x3304 am_soft_mute_ release_rate sets softmute release rate. smaller values provide slower release, and larger values provide faster release. the default is 8192 (approximately 8000 db/s). 0x2000 si4740/41/42/43/ 44/45 0x3305 am_soft_mute_ attack_rate sets software attack rate . smaller values provide slower attack, and larger values provide faster attack. the default is 8192 (approximately 8000 db/s). 0x2000 si4740/41/42/43/ 44/45 table 13. am/sw/lw receiver property summary (continued) prop name description default available in notes: 1. the 1 khz option, 1.8 khz option, and 100 hz high-pass line no ise rejection filter are suppo rted on si473x-c40 and later devices and si474x devices (am_sw_lw component 3.0 or later). 1. the 2.5 khz option is supported on si473x-c40 and later devices (am_sw_lw component 5.0 or later). 2. component 1.0 incorrectly reports 0x06b 9 (1721 khz) as default for am_seek_ba nd_top. after power_up command is complete, set am_seek_band_top to 0x06ae (1 710 khz) using the set_property command.
an332 rev. 1.0 127 0x3400 am_seek_band_ bottom sets the bottom of the am band for seek. default is 520. 0x0208 all 0x3401 am_seek_band_top 2 sets the top of the am band for seek. default is 1710. 0x06ae all 0x3402 am_seek_freq_ spacing selects frequency spacing for am seek. default is 10 khz spacing. 0x000a all 0x3403 am_seek_snr_ threshold sets the snr threshold for a valid am seek/tune. if the value is zero then snr threshold is not considered when doing a seek. default value is 5db. 0x0005 all 0x3404 am_seek_rssi_ threshold sets the rssi threshold for a valid am seek/tune. if the value is zero then rssi threshold is not considered when doing a seek. default value is 25 dbv. 0x0019 all 0x3702 am_agc_attack_ rate sets the number of m illiseconds the high peak detector must be exceeded before decreasing gain. default value is 4 (approximately 1400 db/s). 0x0004 si4740/41/42/43/ 44/45 0x3703 am_agc_release_ra te sets the number of m illiseconds the low peak detector must not be exceeded before increasing the gain. default value is 140 (approximately 40 db/s). 0x008c si4740/41/42/43/ 44/45 0x3705 am_frontend_agc_ control adjusts am agc for frontend (external) attenuator and lna. (si4740/41/42/43/44/45 only) 0x130c si4740/41/42/43/ 44/45 0x3900 am_nb_detect_ threshold sets the threshold for detecting impulses in db above the noise floor. default value is 12. 0x000c si4742/43/44/45 0x3901 am_nb_interval interval in micro- seconds that orig inal samples are replaced by interpolated clean samples. default value is 55 s. 0x0037 si4742/43/44/45 0x3902 am_nb_rate noise blanking rate in 100 h z units. default value is 64. 0x0040 si4742/43/44/45 0x3903 am_nb_iir_filter sets the bandwidth of the noise floor estimator. default value is 300. 0x012c si4742/43/44/45 0x3904 am_nb_delay delay in micro-seconds before applying impulse blanking to the original samples. default value is 172. 0x00ac si4742/43/44/45 0x4000 rx_volume sets the output volume. 0x003f all 0x4001 rx_hard_mute mutes the l and r audio outputs. 0x0000 all table 13. am/sw/lw receiver property summary (continued) prop name description default available in notes: 1. the 1 khz option, 1.8 khz option, and 100 hz high-pass line no ise rejection filter are suppo rted on si473x-c40 and later devices and si474x devices (am_sw_lw component 3.0 or later). 1. the 2.5 khz option is supported on si473x-c40 and later devices (am_sw_lw component 5.0 or later). 2. component 1.0 incorrectly reports 0x06b 9 (1721 khz) as default for am_seek_ba nd_top. after power_up command is complete, set am_seek_band_top to 0x06ae (1 710 khz) using the set_property command.
an332 128 rev. 1.0 table 14. status response for the am/sw/lw receiver bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x rsqint x x stcint bit name function 7cts clear to send. 0 = wait before sending next command. 1 = clear to send next command. 6err error. 0=no error 1 = error 5:4 reserved values may vary. 3rsqint received signal quality interrupt. 0 = received signal quality meas urement has not been triggered. 1 = received signal quality me asurement has been triggered. 2:1 reserved values may vary. 0stcint seek/tune complete interrupt. 0 = tune complete has not been triggered. 1 = tune complete has been triggered.
an332 rev. 1.0 129 5.3.1. am/sw/lw receiver commands command 0x01. power_up initiates the boot process to move the device from powe rdown to powerup mode. the boot can occur from internal device memory or a system controller downloaded patch. to confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the power_up command with func = 15 (query library id). the device returns the resp onse, including the library revision, and then moves into powerdown mode. the device can then be placed in powerup mode by issuing the power_up command with func = 1 (am/sw/lw receive) and the patch may be ap plied. see section "7.2. powerup from a component patch" on page 216 for more information. the power_up command configures the state of rout (pin 13) and lout (pin 14) for analog audio mode and gpo2/int (pin 18) for interrupt operation. for the si4731/ 35/37, the power_up command also configures the state of gpo3/dclk (pin 17), dfs (pin 16), and dout (pin 15) for digital audio mode. the command configures gpo2/int interrupts (gpo2oen) and cts interrupts (ctsien). if both are enabled, gpo2/int is driven high during normal operation and low for a minimum of 1 s duri ng the interrupt. the ctsien bit is duplicated in the gpo_ien property. the command is complete when the cts bit (and optional interrupt) is set. note: to change function (e.g. am/sw/lw rx to fm rx), i ssue power_down command to stop current function; then, issue power_up to start new function. note: delay at least 500 ms between powerup command and first tu ne command to wait for the oscillator to stabilize if xoscen is set and crystal is used as the rclk. available in: all command arguments: two response bytes: none (func = 1), seven (func = 15) command bit d7d6d5d4d3d2d1d0 cmd 00000001 arg1 ctsien gpo2oen patch xoscen func[3:0] arg2 opmode[7:0] arg bit name function 1 7 ctsien cts interrupt enable. 0 = cts interrupt disabled. 1 = cts interrupt enabled. 1 6 gpo2oen gpo2 output enable. 0 = gpo2 output disabled (hi-z). 1 = gpo2 output enabled. 15 patch patch enable. 0 = boot normally 1 = copy nvm to ram, but do not boot. after cts has been set, ram may be patched.
an332 130 rev. 1.0 response (to func = 1, am receive) response (to func = 15, query library id) 1 4 xoscen crystal oscillator enable. 0 = use external rclk (cryst al oscillator disabled). 1 = use crystal oscillator (rclk and gp o3/dclk with external 32.768 khz crystal and opmode = 00000101). see si473x data sheet application schematic for external bom details. 1 3:0 func[3:0] function. 0=reserved. 1 = am/sw/lw receive. 2?14 = reserved. 15 = query library id. 2 7:0 opmode[7:0] application setting 00000101 = analog audio outputs (lout/rout). 00001011 = digital audio output (dclk, lout/dfs, rout/dio) 10110000 = digital audio outputs (dclk, dfs, dio) (si4731/35/37 only with xoscen = 0). 10110101 = analog and digital audio outputs (lout/rout and dclk, dfs, dio) (si4731/35/37 only with xoscen = 0). bit d7d6d5d4d3d2d1d0 status cts err x x rsqint x x stcint bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint x x stcint resp1 pn[7:0] resp2 fwmajor[7:0] resp3 fwminor[7:0] resp4 reserved[7:0] resp5 reserved[7:0] resp6 chiprev[7:0] resp7 libraryid[7:0] resp bit name function 1 7:0 pn[7:0] final 2 digits of part number (hex). 2 7:0 fwmajor[7:0] firmware major revision (ascii). 3 7:0 fwminor[7:0] firmware minor revision (ascii). 4 7:0 reserved[7:0] reserved, various values. 5 7:0 reserved[7:0] reserved, various values. 6 7:0 chiprev[7:0] chip revision (ascii). 7 7:0 libraryid[7:0] library revision (hex). arg bit name function
an332 rev. 1.0 131 command 0x10. get _ rev returns the part number, chip revision, firmware revision, patch revision and component revision numbers. the command is complete when the cts bit (and optional inte rrupt) is set. this command may only be sent when in powerup mode. available in: all command arguments: none response bytes: eight command response bit d7d6d5 d4 d3 d2 d1 d0 cmd 000 1 0 0 0 0 bit d7d6d5d4d3d2d1d0 status cts err x x rsqint x x stcint resp1 pn[7:0] resp2 fwmajor[7:0] resp3 fwminor[7:0] resp4 patch h [7:0] resp5 patch l [7:0] resp6 cmpmajor[7:0] resp7 cmpminor[7:0] resp8 chiprev[7:0] resp bit name function 1 7:0 pn[7:0] final 2 digits of part number (hex). 2 7:0 fwmajor[7:0] firmware major revision (ascii). 3 7:0 fwminor[7:0] firmware minor revision (ascii). 4 7:0 patch h [7:0] patch id high byte (hex). 5 7:0 patch l [7:0] patch id low byte (hex). 6 7:0 cmpmajor[7:0] component major revision (ascii). 7 7:0 cmpminor[7:0] component minor revision (ascii). 8 7:0 chiprev[7:0] chip revision (ascii).
an332 132 rev. 1.0 command 0x11. power _ down moves the device from powerup to powerdo wn mode. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent wh en in powerup mode. note that only the power_up command is accepted in powerdown mode. if the system controller writes a command other than power_up when in powerdown mode, the device does not respond. the device will only respond when a power_up command is written. gpo pins are powered down and no t active during this state. for optimal power down current, gpo2 must be either internally driven low through gpio_ctl command or externally driven low. note: in amrx component 1.0, a reset is required when the system controller writes a command other than power_up when in powerdown mode. note: the following describes the state of all the pins when in powerdown mode: gpio1, gpio2, gpio3 = 0 rout, lout, dout, dfs = hiz available in: all command arguments: none response bytes: none command response bit d7d6d5d4d3d2d1d0 cmd 00010001 bit d7d6d5d4d3d2d1d0 status cts err x x rsqint x x stcint
an332 rev. 1.0 133 command 0x12. set _ property sets a property shown in table 13, ?am/sw/lw receiv er property summary,? on page 125. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. see figure 29, ?cts and set_property command complete tcomp timing model,? on page 226 and table 47, ?command timing parameters for the am receiver,? on page 229. available in: all command arguments: five response bytes: none command bit d7 d6 d5 d4 d3 d2 d1 d0 cmd 00010010 arg1 00000000 arg2 prop h [7:0] arg3 prop l [7:0] arg4 propd h [7:0] arg5 propd l [7:0] arg bit name function 1 7:0 reserved always write to 0. 27:0prop h [7:0] property high byte. this byte in combination with prop l is used to specif y the property to modify. see section "5.3.2. am/sw/lw receiver properties" on page 146. 37:0prop l [7:0] property low byte. this byte in combination with prop h is used to specify the property to modify. see section "5.3.2. am/sw/lw receiver properties" on page 146. 47:0propd h [7:0] property value high byte. this byte in combination with propd l is used to set the property value. see section "5.3.2. am/sw/lw receiver properties" on page 146. 57:0propd l [7:0] property value low byte. this byte in combination with propd h is used to set the property value. see section "5.3.2. am/sw/lw receiver properties" on page 146.
an332 134 rev. 1.0 command 0x13. get _ property gets a property shown in table 13, ?am/sw/lw receiv er property summary,? on page 125. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. available in: all command arguments: three response bytes: three command response bit d7d6d5d4d3d2d1d0 cmd 00010011 arg1 00000000 arg2 prop h [7:0] arg3 prop l [7:0] arg bit name function 1 7:0 reserved always write to 0. 27:0 prop h [7:0] property high byte. this byte in comb ination with prop l is used to specify the property to get. 37:0 prop l [7:0] property low byte. this byte in comb ination with prop h is used to specify the property to get. bitd7d6d5d4d3d2d1d0 status cts err x x rsqint x x stcint resp1 00000000 resp2 propd h [7:0] resp3 propd l [7:0] resp bit name function 1 7:0 reserved alwa ys returns 0. 27:0propd h [7:0] property value high byte. this byte in combination with propd l represents the requested property value. 37:0propd l [7:0] property value high byte. this byte in combination with propd h represents the requested property value.
an332 rev. 1.0 135 command 0x14. get _ int _ status updates bits 6:0 of the status byte. this command shou ld be called after any command that sets the stcint or rsqint bits. when polling this command should be periodically called to monitor the status byte, and when using interrupts, this command should be called after the in terrupt is set to update the status byte. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be set when in powerup mode. available in: all command arguments: none response bytes: none command response command 0x40. am _ tune _ freq tunes the am/sw/lw receive to a frequency between 149 and 23 mhz in 1 khz steps. in am only mode, the valid frequency is between 520 and 1710 khz in 1 khz steps. the cts bit (and optional interrupt) is set when it is safe to send the next command. the err bit (and optional interrupt) is set if an invalid argument is sent. note that only a single interrupt occurs if both the cts and err bits ar e set. the optional stc interrupt is set when the command completes. the stcint bit is set only after the get_int_status command is called. this command may only be sent when in powerup mode. the command clears the stc bit if it is already set. see figure 28, ?cts and stc timing model,? on page 226 and table 47, ?command timing parameters for the am receiver,? on page 229. am: lo frequency is 45 khz above rf for rf frequencies < 1000 khz and 45 khz below rf for rf frequencies > 1000 khz. for example, lo frequency is 945 khz when tuning to 900 khz. note: fast bit is supported in si473x-c40 and later devices and si474x devices (amrx component 3.0 or later). antcap bits are supported in amrx component 2.0 or later (all devices except si4730-a10). available in: all command arguments: five response bytes: none command bit d7d6d5d4d3d2d1d0 cmd 00010100 bitd7d6d5d4d3d2d1d0 status cts err x x rsqint x x stcint bit d7d6d5d4d3d2d1d0 cmd 01000000 arg1 0000000fast arg2 freq h [7:0]
an332 136 rev. 1.0 response arg3 freq l [7:0] arg4 antcap h [15:8] arg5 antcap l [7:0] arg bit name function 1 7:1 reserved always write to 0. 1 0 fast fast tuning. if set, executes fast and invalidated tune. the tune st atus will not be accurate. 27:0 freq h [7:0] tune frequency high byte. this byte in combination with freq l selects the tune frequenc y in khz. in am/sw/lw mode, the valid range is from 149 to 23000 (149 khz?23 mhz). in am only mode the valid range is from 520 to 1710 (520?1710 khz). 37:0 freq l [7:0] tune frequency low byte. this byte in comb ination with freq h selects the tune frequency in khz. in am/sw/lw mode, the valid range is from 149 to 23000 (149 khz?23 mhz). in am only mode the valid range is from 520 to 1710 (520?1710 khz). 415:8 antcap h [15:8] antenna tuning capacitor high byte. this byte in combination with antcap l selects the tuning capacitor value. if both bytes are set to zero, the tuning capacitor valu e is selected automati cally. if the value is set to anything other than 0, the tuning ca pacitance is manually set as 95 ff x antcap + 7 pf. antcap manual range is 1?6143. automatic capacitor tuning is recom- mended. note: in sw mode, antcap h [15:8] needs to be set to 0 and antcap l [7:0] needs to be set to 1. 57:0 antcap l [7:0] antenna tuning capacitor low byte. this byte in combination with antcap h selects the tuning capacitor value. if both bytes are set to zero, the tuning capacitor valu e is selected automati cally. if the value is set to anything other than 0, the tuning ca pacitance is manually set as 95 ff x antcap + 7 pf. antcap manual range is 1?6143. automatic capacitor tuning is recommended. note: in sw mode, antcap h [15:8] needs to be set to 0 and antcap l [7:0] needs to be set to 1. bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint x x stcint
an332 rev. 1.0 137 command 0x41. am_seek_start initiates a seek for a channel that meets the rssi and snr criteria for am. clears any pending stcint or rsqint interrupt status. rsqint is only cleared by the rsq status command when the intack bit is set. the cts bit (and optional interrupt) is set when it is safe to send the next command. the err bit (and optional interrupt) is set if an invalid argument is sent. note that only a sing le interrupt occurs if both the cts and err bits are set. the optional stc interrupt is set when the command completes. the stcint bit is set only after the get_int_status command is called. this command ma y only be sent when in powerup mode. the command clears the stcint bit if it is already set. see figure 2 8, ?cts and stc timing model,? on page 226 and table 47, ?command timing parameters for the am receiver,? on page 229. note: antcap bits are supported in amrx component 2.1 or later. available in: all command arguments: five response bytes: none command bit d7d6d5d4d3d2d1d0 cmd 01000001 arg1 0 0 0 0 seekup wrap 0 0 arg2 00000000 arg3 00000000 arg4 antcap h [15:8] arg5 antcap l [7:0]
an332 138 rev. 1.0 response arg bit name function 1 7:4 reserved always write to 0. 1 3 seekup seek up/down. determines the direction of the search, either up = 1, or down = 0. 12 wrap wrap/halt. determines whether the seek should wrap = 1, or halt = 0 when it hits the band limit. 1 1:0 reserved always write to 0. 2 7:0 reserved always write to 0. 3 7:0 reserved always write to 0. 4 15:8 antcap h [15:8] antenna tuning capacitor high byte. this byte in combination with antcap l selects the tuning capacitor value. if both bytes are set to zero, the tuning capacitor value is selected automati- cally. if the value is set to anything other than 0, the tuning capacitance is manually set as 95 ff x antcap + 7 pf. antcap manual range is 1?6143. automatic capacitor tuning is recommended. note: in sw mode, antcap h [15:8] needs to be set to 0 and antcap l [7:0] needs to be set to 1. 5 7:0 antcap l [7:0] antenna tuning capacitor low byte. this byte in combination with antcap h selects the tuning capacitor value. if both bytes are set to zero, the tuning capacitor value is selected automati- cally. if the value is set to anything other than 0, the tuning capacitance is manually set as 95 ff x antcap + 7 pf. antcap manual range is 1?6143. automatic capacitor tuning is recommended. note: in sw mode, antcap h [15:8] needs to be set to 0 and antcap l [7:0] needs to be set to 1. bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint x x stcint
an332 rev. 1.0 139 command 0x42. am_tune_status returns the status of am_tune_f req or am_seek_start commands. th e commands returns the current frequency, rssi, snr, and the antenna tuning capaci tance value (0?6143). the command clears the stcint interrupt bit when intack bit of arg1 is set. the cts bit (a nd optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. note: afcrl bit does not work properly on amrx component 2.1 or earlier. available in: all command arguments: one response bytes: seven command response bit d7d6d5d4d3d2d1d0 cmd 01000010 arg1 000000cancelintack arg bit name function 1 7:2 reserved always write to 0. 11 cancel cancel seek. if set, aborts a seek currently in progress. 10 intack seek/tune interrupt clear. if set, clears the seek/tune comp lete interrupt st atus indicator. bit d7 d6d5d4 d3 d2 d1 d0 status cts err x x rsqint x x stcint resp1 bltf x x x x x afcrl valid resp2 readfreq h [7:0] resp3 readfreq l [7:0] resp4 rssi[7:0] resp5 snr[7:0] resp6 readantcap h [15:8] resp7 readantcap l [7:0]
an332 140 rev. 1.0 resp bit name function 17 bltf band limit. reports if a seek hit the band limit (wrap = 0 in am_start_seek) or wrapped to the original frequency (wrap = 1). 1 6:2 reserved always returns 0. 1 1 afcrl afc rail indicator. set if the afc rails. 10 valid valid channel. set if the channel is currently valid and would have been found during a seek. 2 7:0 readfreq h [7:0] read frequency high byte. this byte in combin ation with readfreq l returns frequency being tuned (khz). 3 7:0 readfreq l [7:0] read frequency low byte. this byte in combin ation with readfreq h returns frequency being tuned (khz). 4 7:0 rssi[7:0] received signal strength indicator. this byte contains the receive sign al strength when tune is completed (dbv). 5 7:0 snr[7:0] snr. this byte contains the snr metric when tune is completed (db). 6 7:0 readantcap h [15:8] read antenna tuning capacitor high byte. this byte in combin ation with readantcap l returns the current antenna tuning capacitor value. the tuning capacitance is 95 ff x readantcap + 7pf. 7 7:0 readantcap l [7:0] read antenna tuning capacitor low byte. this byte in combin ation with readantcap h returns the current antenna tuning capacitor value. the tuning capacitance is 95 ff x readantcap + 7pf.
an332 rev. 1.0 141 command 0x43. am_rsq_status returns status information about the received signal quality. the commands returns rssi and snr. it also indicates valid channel (valid), soft mute engagement (smute), and afc rail status (afcrl). this command can be used to check if the received signal is above th e rssi high threshold as repo rted by rssihint, or below the rssi low threshold as reported by rssilint. it can al so be used to check if the signal is above the snr high threshold as reported by snrhint, or below the snr low threshold as reported by snrlint. the command clears the rsqint, snrhint, snrlint, rssihint, and rssi lint interrupt bits when intack bit of arg1 is set. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. note: afcrl bit does not work properly on amrx component 2.1 or earlier. available in: all command arguments: one response bytes: five command response bit d7d6d5d4d3d2d1d0 cmd 01000011 arg1 0000000intack arg bit name function 10intack interrupt acknowledge. 0 = interrupt status preserved. 1 = clears rsqint, snrhint, snrlint, rssihint, rssilint bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint x x stcint resp1 x x x x snrhint snrlint rssi- hint rssiilint resp2 x x x x smute x afcrl valid resp3 xxxxxxxx resp4 rssi[7:0] resp5 snr[7:0]
an332 142 rev. 1.0 command 0x47. am_agc_status returns the am agc setting of the device. the command returns whether the agc is enabled or disabled and it returns the gain index. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in power up mode. available in: all command arguments: none response bytes: two command response resp bit name function 1 3 snrhint snr detect high. 0 = received snr has not exceeded above snr high threshold. 1 = received snr has exceeded above snr high threshold. 1 2 snrlint snr detect low. 0 = received snr has not exceeded below snr low threshold. 1 = received snr has exceeded below snr low threshold. 1 1 rssihint rssi detect high. 0 = rssi has not exceeded above rssi high threshold. 1 = rssi has exceeded above rssi high threshold. 1 0 rssilint rssi detect low. 0 = rssi has not exceeded below rssi low threshold. 1 = rssi has exceeded below rssi low threshold. 23 smute soft mute indicator. indicates soft mute is engaged. 2 1 afcrl afc rail indicator. set if the afc rails. 20 valid valid channel. set if the channel is currently valid and would have been found during a seek. 4 7:0 rssi[7:0] received signal strength indicator. contains the current receiv e signal strength (dbv). 57:0 snr[7:0] snr. contains the current snr metric (db). bit d7d6d5d4d3d2d1d0 cmd 01000111 bitd7d6d5d4d3d2d1d0 status cts err x x rsqint x x stcint resp1 xxxxxxxamagcdis resp2 amagcndx[7:0]
an332 rev. 1.0 143 command 0x48. am_agc_override overrides the am agc setting by disabling the agc and forcing the gain index that ranges between 0 (minimum attenuation) and 37+attn_backup (maximum attenuation). th e cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in power up mode. available in: all command arguments: two response bytes: none command response resp bit name function 1 0 amagcdis am agc disable this bit indicates if the agc is enabled or disabled. 0 = agc enabled. 1 = agc disabled. 2 7:0 amagcndx am agc index this byte reports the current agc gain index. 0 = minimum attenuation (max gain) 1 ? 36+attn_backup = intermediate attenuation 37+attn_backup = maximum attenuation (min gain) note: the max index is subject to change. see property 0x3705 am_frontend_agc_control for details on attn_backup. bit d7d6d5d4d3d2d1 d0 cmd 0100100 0 arg1 0000000amagcdis arg2 amagcndx[7:0] arg bit name function 1 0 amagcdis am agc disable this bit selects whether the agc is enabled or disabled. 0 = agc enabled. 1 = agc disabled. 2 7:0 amagcndx am agc index if amagcdis = 1, this byte forces the agc gain index. 0 = minimum attenuation (max gain) 1 ? 36+attn_backup = intermediate attenuation 37+attn_backup = maximum attenuation (min gain) *note: the max index is subject to change. see property 0x3705 am_frontend_agc_control for details on attn_backup. bitd7d6d5d4d3d2d1d0 status cts err x x rsqint x x stcint
an332 144 rev. 1.0 command 0x80. gpio_ctl enables output for gpo1, 2, and 3. gpo1, 2, and 3 can be configured for output (hi-z or active drive) by setting the gpo1oen, gpo2oen, and gpo3oen bit. the state (h igh or low) of gpo1, 2, and 3 is set with the gpio_set command. to avoid excessive current consumption due to oscillation , gpo pins should not be left in a high impedance state. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. the default is all gpo pins set for high impedance. notes: 1. gpio_ctl is supported in am_s w_lw component 2.0 or later. 2. the use of gpo2 as an interrupt pin and /or the use of gpo3 as dclk digital clock input will override this gpio_ctl function for gpo2 and/or gpo3 respectively. available in: all command arguments: one response bytes: none command response bitd7d6d5d4d3d2d1d0 cmd 10000000 arg1 0 0 0 0 gpo3oen gpo2oen gpo1oen 0 arg bit name function 1 7:4 reserved always write 0. 1 3 gpo3oen gpo3 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 2 gpo2oen gpo2 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 1 gpo1oen gpo1 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 0 reserved always write 0. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 rev. 1.0 145 command 0x81. gpio_set sets the output level (high or low) for gpo1, 2, and 3. gp o1, 2, and 3 can be configured for output by setting the gpo1oen, gpo2oen, and gpo3oen bit in the gpio_ctl command. to avoid excessive current consumption due to oscillation, gpo pins should not be left in a high impedance state. the cts bit (and optional interrupt) is set when it is safe to send the next command. this prop erty may only be set or read when in powerup mode. the default is all gpo pins set for high impedance. note: gpio_set is supported in am_sw_lw component 2.0 or later. available in: all command arguments: one response bytes: none command response bit d7 d6d5d4 d3 d2 d1 d0 cmd 10000001 arg1 0 0 0 0 gpo3level gpo2level gpo1level 0 arg bit name function 1 7:4 reserved always write 0. 1 3 gpo3level gpo3 output level. 0 = output low (default). 1 = output high. 1 2 gpo2level gpo2 output level. 0 = output low (default). 1 = output high. 1 1 gpo1level gpo1 output level. 0 = output low (default). 1 = output high. 1 0 reserved always write 0. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x x rdsint asqint stcint
an332 146 rev. 1.0 5.3.2. am/sw/lw receiver properties property 0x0001. gpo_ien configures the sources for the gpo2/int interrupt pin. valid sources are the lower 8 bits of the status byte, including cts, err, rsqint, and stcint bits. the corres ponding bit is set before the interrupt occurs. the cts bit (and optional interrupt) is set when it is safe to send the next command. the cts interrupt enable (ctsien) can be set with this property and the power_up command. the state of the ctsien bit set during the power_up command can be read by reading this prop erty and modified by writing this pr operty. this property may only be set or read when in powerup mode. available in: all default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 rsqrep 0 0 stcrep ctsien errien 0 0 rsqien 0 0 stcien bit name function 15:12 reserved always write to 0. 11 rsqrep rsq interrupt repeat. 0 = no interrupt generated when rsqint is already set (default) 1 = interrupt generated even if rsqint is already set 10:9 reserved always write to 0. 8 stcrep stc interrupt repeat. 0 = no interrupt generated when stcint is already set (default) 1 = interrupt generated even if stcint is already set 7ctsien cts interrupt enable. after powerup, this bit reflects the ctsien bit in arg1 of powerup command. 0 = no interrupt generated when cts is set 1 = interrupt generated when cts is set 6errien err interrupt enable. 0 = no interrupt generated when err is set (default) 1 = interrupt generated when err is set 5:4 reserved always write to 0. 3rsqien rsq interrupt enable. 0 = no interrupt generated when rsqint is set (default) 1 = interrupt generated when rsqint is set 2:1 reserved always write to 0. 0stcien seek/tune complete interrupt enable. 0 = no interrupt generated wh en stcint is set (default) 1 = interrupt generated when stcint is set
an332 rev. 1.0 147 property 0x0102. digital_output_format configures the digital audio output format. configuration options include dclk edge, data format, force mono, and sample precision. note: digital_output_format is supported in am_sw_lw component 2.0 or later. available in: si4705/06, si4731/35/37/39, si4730/3 4/36/38-d60 and later, si4741/43/45, si4784/85 default: 0x0000 bit 15141312111098 7 65432 1 0 name 00000000ofall omode[3:0] 0osize[1:0] bit name function 15:8 reserved always write to 0. 7ofall digital output dclk edge. 0 = use dclk rising edge 1 = use dclk falling edge 6:3 omode[3:0] digital output mode. 0000 = i 2 s 0110 = left-justified 1000 = msb at second dclk after dfs pulse 1100 = msb at first dclk after dfs pulse 2 reserved always write to 0. 1:0 osize[1:0] digital output audio sample precision. 0=16-bits 1=20-bits 2=24-bits 3 = 8-bits
an332 148 rev. 1.0 property 0x0104. digital_output_sample_rate enables digital audio output and configures digital audio output sample rate in samples per second (sps). when dosr[15:0] is 0, digital audio output is disabled. to enable digital audio output, program dosr[15:0] with the sample rate in samples per second. the over-sampling ra te must be set in order to satisfy a minimum dclk of 1mhz. the system controller must establish dclk and dfs prior to enabling the digital audio output else the device will not respond and will require reset. the sample rate must be set to 0 before dclk/dfs is removed. am_tune_freq command must be sent after the power_up command to start the internal clocking before setting this property. note: digital_output_sample_rate is supported in am_sw_lw component 2.0 or later. available in: si4705/06, si4731/35/37/39, si4730/3 4/36/38-d60 and later, si4741/43/45, si4784/85 default: 0x0000 (digital audio output disabled) units: sps range: 32?48 ksps, 0 to disable digital audio output bit 151413121110 9 8 7 6 5 4 3 2 1 0 name dosr[15:0] bit name function 15:0 dosr[15:0] digital output sample rate. 32?48 ksps. 0 to disable digital audio output.
an332 rev. 1.0 149 property 0x0201. refclk_freq sets the frequency of the refclk from the output of the prescaler. the refclk range is 31130 to 34406 hz (32768 5% hz) in 1 hz steps, or 0 (to disable afc). fo r example, an rclk of 13mhz would require a prescaler value of 400 to divide it to 32500 hz refclk. the refer ence clock frequency property would then need to be set to 32500 hz. rclk frequencies between 31130 hz and 40 mhz are supported, however, t here are gaps in frequency coverage for prescaler values ranging from 1 to 10, or frequencies up to 311300 hz. the following table summarizes these rclk gaps. figure 12. refclk prescaler the rclk must be valid 10 ns before and 10 ns after completing the wb_tune_freq command. in addition, the rclk must be valid at all times when the carrier is enab led for proper agc operation. the rclk may be removed or reconfigured at other times. the cts bit (and optional inte rrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. the default is 32768 hz. available in: all default: 0x8000 (32768) units: 1 hz step: 1hz range: 31130-34406 table 15. rclk gaps prescaler rclk low (hz) rclk high (hz) 1 31130 34406 2 62260 68812 3 93390 103218 4 124520 137624 5 155650 172030 6 186780 206436 7 217910 240842 8 249040 275248 9 280170 309654 10 311300 344060 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name refclkf[15:0] rclk refclk pin 9 prescaler divide by 1-4095 31.130 khz ? 40 mhz 31.130 khz ? 34.406 khz
an332 150 rev. 1.0 property 0x0202. refclk_prescale sets the number used by the prescaler to divide the exte rnal rclk down to the internal refclk. the range may be between 1 and 4095 in 1 unit steps. for example, an rclk of 13 mhz would require a prescaler value of 400 to divide it to 32500 hz. the reference clock frequency property would then need to be set to 32500 hz. the rclk must be valid 10 ns before sending and 20 ns after completing the am_tune_freq and am_seek_start commands. in addition, the rclk must be valid at all times for proper afc operation. the rclk may be removed or reconfigured at other times. the cts bit (and optional inte rrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 1. available in: all default: 0x0001 step: 1 range: 1?4095 *note: for shortwave frequencies, choose a prescalar value such that you can limit the refclk frequency range to 31130? 32768* hz. bit name function 15:0 refclkf[15:0] frequency of reference clock in hz. the allowed refclk frequency range is between 31130 and 34406 hz (32768 5%), or 0 (to disable afc). bitd15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000 rclk sel rclkp[11:0] bit name function 15:13 reserved always write to 0. 12 rclksel rclksel. 0 = rclk pin is clock source. 1 = dclk pin is clock source. 11:0 rclkp[11:0] prescaler for reference clock. integer number used to divide the rclk frequency down to refclk frequency. the allowed refclk frequency range is between 31130 and 34406* hz (32768 5%), or 0 (to disable afc).
an332 rev. 1.0 151 property 0x3100. am_deemphasis sets the am receive de-emphasis to 50 s. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or re ad when in powerup mode. the default is disabled. available in: all default: 0x0000 property 0x3102. am_channel_filter selects the bandwidth of the am channel filter. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 2 khz bandwidth channel filter. note: the 1 khz option, 1.8 khz option, and 100 hz high-pass line noise rejection filter are supported on si473x-c40 and later devices and si474x devices (am_sw_lw component 3.0 or later). the 2.5 khz option is supported on si473x-c40 and later devices (am_sw_lw component 5.0 or later). available in: all default: 0x0003 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1 d0 name 000000000000000deemph bit name function 15:1 reserved always write to 0. 0 deemph am de-emphasis. 1=50s. 0 = disabled. bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 000000amplflt0000amchflt[03:0] bit name function 15:9 reserved always write to 0. 8 amplflt enables the am power line noise rejection filter 7:4 reserved always write to 0. 3:0 amchfilt am channel filter. selects the bandwidth of the am channel filter. the following choices are available: 0=6khz bandwidth 1=4khz bandwidth 2=3khz bandwidth 3=2khz bandwidth 4=1khz bandwidth 5=1.8khz bandwidth 6 = 2.5 khz bandwidth, gradual roll off 7?15 = reserved (do not use)
an332 152 rev. 1.0 property 0x3103. am_automatic_volume_control_max_gain sets the maximum gain for automatic volume control. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 16 db. the maximum avc gain affects audio output level, especially under weak signal conditions. it amplifies the signal as well as noise. when a signal is ve ry weak (needs a lot of gain) then the maximum gain will be applied, and may make the noise too harsh for the listener, even the soft mute functions. the user can reduce the noise further by adjusting the maximum avc gain. the property allows th e user to optimize the trade-off between maintaining output level and suppressing noise. note: the maximum avc gain is not configurable in si473x-b20 dev ices (fmrx component 2.1 and earlier), and is 90.3 db. this would be equivalent to am_automatic_volume_cont rol_max_gain property value 0x7800, which is the maximum value. available in: si473x-c40 and later, si474x default: 0x1543 (si473x-c40 and later) 0x7800 (si474x) step: 1 range: 0x1000 ~ 0x7800 property 0x3104. am_mode_afc_sw_pull_in_range sets the sw afc pull-in or tracking range. the value pull_in_range is relative to the tuned frequency and is specified as 1/(ppm10 ?6 ). for example to program a pull-in range of 115 ppm, pull_in_range = 1/(11510 ?6 ) = 8695. the command is complete when the cts bit (and optional interrupt) is set. available in: si4734/35-c40 and later, si4742/43/44/45 default: 0x21f7 (115 ppm) bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1 d0 name 0 avc_maxgain [14:0] bit name function 15 reserved always write to 0. 14:0 avc_maxgain automatic volume control max gain. maximum gain for automatic volume control. the max gain value is given by avc_maxgain = g * 340.2 where g is the desired maximum avc gain in db. minimum of 12 db is recommend when softmute is enabled. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1 d0 name swpir[15:0]
an332 rev. 1.0 153 property 0x3105. am_mode_afc_sw_lock_in_range sets the sw afc lock-in or capture range. the value lo ck_in_range is relative to the tuned frequency and is specified as 1/( ppm10 ?6 ). for example to program a lock-in range of 85 ppm, lock_in_range = 1/(8510 ?6 ) = 11765. the command is complete when the cts bit (and optional interrupt) is set. available in: si4734/35-c40 and later, si4742/43/44/45 default: 0x2df5 (85 ppm) property 0x3200. am_rsq_int_source configures interrupt related to received signal quality metr ics. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. available in: all default: 0x0000 bit name function 15:0 swpir[15:0] sw pull-in range the sw pull-in range expressed relative to the tuned frequency. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1 d0 name swpir[15:0] bit name function 15:0 swpir[15:0] sw pull-in range the sw lock-in range expressed relative to the tuned frequency. bit d15d14d13d12d11d10d9d8d7d6d5d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 0 0 0 snrhien snrlien rssihien rssilien
an332 154 rev. 1.0 bit name function 15:4 reserved always write 0. 3 snrhien interrupt source enable: snr high. enable snr high as the source of interrup t which the threshold is set by am_rsq_sn- r_hi_threshold. 2 snrlien interrupt source enable: snr low. enable snr low as the as the source of in terrupt which the threshold is set by am_r- sq_snr_lo_threshold. 1 rssihien interrupt source enable: rssi high. enable rssi low as the source of interr upt which the threshold is set by am_r- sq_rssi_hi_threshold. 0 rssilien interrupt source enable: rssi low. enable rssi low as the source of interr upt which the threshold is set by am_r- sq_rssi_lo_threshold.
an332 rev. 1.0 155 property 0x3201. am_rsq_snr_hi_threshold sets high threshold which triggers the rsq interrupt if the snr is above this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 127 db. available in: all default: 0x007f units: db step: 1 range: 0?127 property 0x3202. am_rsq_snr_lo_threshold sets low threshold whic h triggers the rsq interrupt if the snr is be low this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 0 db. available in: all default: 0x0000 units: db step: 1 range: 0?127 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 0 0 0 0 0 0 0 0 snrh[6:0] bit name function 15:7 reserved always write to 0. 6:0 snrh am rsq snr high threshold. threshold which triggers the rsq interrupt if the snr goes above this threshold. specified in units of db in 1 db steps (0?127). default is 0 db. bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 snrl[6:0] bit name function 15:7 reserved always write to 0. 6:0 snrl am rsq snr low threshold. threshold which triggers the rsq interrupt if the snr goes below this threshold. specified in units of db in 1 db steps (0?127). default is 0 db.
an332 156 rev. 1.0 property 0x3203. am_r sq_rssi_hi_threshold sets high threshold which triggers the rsq interrupt if the rssi is above this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 127 db. available in: all default: 0x007f units: dbv step: 1 range: 0?127 property 0x3204. am_rsq_rssi_lo_threshold sets low threshold which triggers the rsq interrupt if the rssi is below this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 0 db. available in: all default: 0x0000 units: dbv step: 1 range: 0?127 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 00000000 rssih[6:0] bit name function 15:7 reserved always write to 0. 6:0 rssih am rsq rssi high threshold. threshold which triggers the rsq interrupt if the rssi goes above this threshold. spec- ified in units of dbv in 1 db steps (0?127). default is 0 dbv. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 00000000 rssil[6:0] bit name function 15:7 reserved always write to 0. 6:0 rssil am rsq rssi low threshold. threshold which triggers the rsq interrupt if the rssi goes below this threshold. spec- ified in units of dbv in 1 db steps (0?127). default is 0 dbv.
an332 rev. 1.0 157 property 0x3300. am_soft_mute_rate sets the attack and decay rates when entering or leaving soft mute. the value specified is multiplied by 4.35 db/s to come up with the actual attack rate. the cts bit (and optio nal interrupt) is set when it is safe to send the next command. this property may only be set or read wh en in powerup mode. the default rate is 278 db/s. available in: all default: 0x0040 actual rate: smrate x 4.35 units: db/s step: 1 range: 1?255 property 0x3301. am_soft_mute_slope configures attenuation slope during soft mute in db attenuation per db snr below the soft mute snr threshold. soft mute attenuation is the minimum of smslope x (smthr ? snr) and smattn. the recommended smslope value is ceiling(smattn/smthr) . smattn and smthr are set via the am_soft_mute_max_attenuation and am_soft_mu te_snr_threshold properties. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default slope is 1 db/db for amrx component 5.0 or later and 2 db/db for amrx component 3.0 or earlier. available in: all default: 0x0002 (si4730/31/34/35/ 36/37-b20 and earlier, si4740/41 /42/43/44/45-c10 and earlier) 0x0001 (all others) units: db/db range: 1?5 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name smrate[15:0] bit name function 15:0 smrate am soft mute rate. determines how quickly the am goes into soft mute when soft mute is enabled. the actual rate is calculated by taking the valu e written to the field and multiplying it with 4.35 db/s. the default rate is 278 db/s (smrate[15:0] = 0x0040). bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 00000000000 smslope[3:0] bit name function
an332 158 rev. 1.0 property 0x3302. am_soft_mute_max_attenuation sets maximum attenuation during soft mute (db). set to 0 to disable soft mute. the cts bit (and optional interrupt) is set when it is safe to send the next command. this pr operty may only be set or read when in powerup mode. the default attenuation is 8 db for amrx component 5.0 or later and 16 db for amrx component 3.0 or earlier. available in: all default: 0x0010 (si4730/31/34/35/ 36/37-b20 and earlier, si4740/41 /42/43/44/45-c10 and earlier) 0x0008 (all others) units: db step: 1 range: 0?63 property 0x3303. am_soft_mute_snr_threshold sets the snr threshold to engage soft mute. whenever th e snr for a tuned frequency drops below this threshold the am reception will go in soft mute , provided soft mute max attenuation pr operty is no n-zero. the cts bit (and optional interrupt) is set when it is sa fe to send the next command. this property may only be set or read when in powerup mode. the default snr threshold is 8 db fo r amrx component 5.0 or later and 10 db for amrx component 3.0 or earlier. available in: all default: 0x000a (si4730/31/34/35/36/37-b20 an d earlier, si4740/41/42/4 3/44/45-c10 and earlier) 0x0008 (all others) units: db step: 1 range: 0?63 15:4 reserved always write to 0. 3:0 smslope[3:0] am slope mute attenuation slope. set soft mute attenuation slope in db attenuation per db snr below the soft mute snr threshold. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 000000000 smattn[5:0] bit name function 15:6 reserved always write to 0. 5:0 smattn am soft mute max attenuation. maximum attenuation to apply when in soft mute. specified in units of db. default maximum attenuation is 8 db. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 000000000 smthr[5:0]
an332 rev. 1.0 159 property 0x3304. am_soft_mute_release_rate sets the soft mute release rate. smaller values provide slower release and larger values provide faster release. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 8192 (approximately 8000 db/s). release rate (db/s) = release[14:0]/1.024 available in: si4740/41/42/43/44/45 default: 0x2000 range: 1?32767 bit name function 15:6 reserved always write to 0. 5:0 smthr am soft mute snr threshold. the snr threshold for a tuned frequency below which soft mute is engaged provided the value written to the am_soft_mute_m ax_attenuation property is not zero. default snr threshold is 8 db. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 release[14:0]
an332 160 rev. 1.0 property 0x3305. am_soft_mute_attack_rate sets the soft mute attack rate. smaller values provide sl ower attack and larger values provide faster attack. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 8192 (approximately 8000 db/s). attack rate (db/s) = attack[14:0]/1.024 available in: si4740/41/42/43/44/45 default: 0x2000 range: 1?32767 figure 13. am softmute snr bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0 attack[14:0] -18 -16 -14 -12 -10 -8 -6 -4 -2 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 snr (db) x=2, y=16, z=10 (default) x=4, y=16, z=10 x=2, y=4, z=10 x=2, y=16, z=13 x = 0x3301: am_soft_mute_slope (0-63 db/db) y = 0x3302: am_soft_mute_max_attenuation (0-63 db) z = 0x3303: am_soft_mute_snr_threshold (0-255 db) softmute gain (db)
an332 rev. 1.0 161 property 0x3400. am_seek_band_bottom sets the lower boundary for the am band in khz. this value is used to determine when the lower end of the am band is reached when performi ng a seek. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 520 khz (0x0208). available in: all default: 0x0208 units: khz step: 1 khz valid range: 149?23000 khz recommended range: ? am in us: 520?1710 khz ? am in asia: 522?1710 khz ? sw: 2300?23000 khz ? lw: 153?279 khz bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name amskfreql[15:0] bit name function 15:0 amskfreql am seek band bottom. specify the lower boundary of the am band when performing a se ek. the seek either stops at this limit or wraps based on the parameters of am_seek_start command that was issued to initiate a seek. the default value for the lower boundary of the am band is 520 khz.
an332 162 rev. 1.0 property 0x3401. am_seek_band_top sets the upper boundary for the am band in khz. this value is used to determine when the higher end of the am band is reached when performi ng a seek. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 1710 khz (0x06ae). available in: all default: 0x06ae note: firmware 1.0 incorrectly reports 0x06b9 (1721 k hz) as default for am_seek_band_top. after power_up command is complete, se t am_seek_band_top to 0x06ae (1710 kh z) using the set_property command. units: khz step: 1 khz valid range: 149?23000 khz recommended range: ? am in us: 520?1710 khz ? am in asia: 522?1710 khz ? sw: 2300?23000 khz ? lw: 153?279 khz bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name amskfreqh[15:0] bit name function 15:0 amskfreqh am seek band top. specify the higher boundary of the am band when performing a se ek. the seek either stops at this limit or wraps based on the parameters of am_seek_start command that was issued to initiate a seek. the default value for the upper boundary of the am band is 1710 khz.
an332 rev. 1.0 163 property 0x3402. am_seek_freq_spacing sets the frequency spacing for the am band when perfo rming a seek. the frequency spacing determines how far the next tune is going to be from the currently tuned frequ ency. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may on ly be set or read when in powerup mode. the default frequency spacing is 10 khz. available in: all default: 0x000a units: khz valid values: 1 (1 khz), 5 (5 khz), 9 (9 khz), and 10 (10 khz). recommended value: ? am in us: 10 (10 khz) ? am in asia: 9 (9 khz) ? sw: 5 (5 khz) ? lw: 9 (9 khz) bit d15d14d13d12d11d10d9 d8d7d6 d5 d4d3d2 d1 d0 name 0 0 0 0 0 0 0 0 0 0 0 0 amskspace[3:0] bit name function 15:4 reserved always write to 0. 3:0 amskspace am seek frequency spacing. sets the frequency spacing when performing a seek in the am band. the default fre- quency spacing is 10 khz.
an332 164 rev. 1.0 property 0x3403. am_ seek_tune_snr_ threshold sets the snr threshold for a valid am s eek/tune. if the value is zero, then s nr is not used as a valid criteria when doing a seek for am. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default threshold is 5 db. available in: all default: 0x0005 units: db step: 1 range: 0?63 property 0x3404. am_ seek_tune_rssi _threshold sets the rssi threshold for a valid am seek/tune. if the value is zero then rssi is not used as a valid criteria when doing a seek for am. the cts bit (and optional interr upt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 25 dbv. available in: all default: 0x0019 units: dbv step: 1 range: 0?63 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 0 amsksnr[5:0] bit name function 15:6 reserved always write to 0. 5:0 amsksnr am seek/tune snr threshold. snr threshold which determines if a valid channel has been found during seek/tune. specified in units of db in 1 db steps (0?63). default threshold is 5 db. bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0 0 0 0 0 0 0 0 0 0 amskrssi[5:0] bit name function 15:6 reserved always write to 0. 5:0 amskrssi am seek/tune received signal strength threshold. rssi threshold which determines if a valid channel has been found during seek/tune. specified in units of dbv in 1 dbv steps (0?63). default threshold is 25 dbv.
an332 rev. 1.0 165 property 0x3702. am_agc_attack_rate sets the agc attack rate. large values provide slower at tack, and smaller values provide faster attack. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read in powerup mode. the default is 4 (approximately 1400 db/s). nominal "5600" is based on silabs ' am antenna dummy and si474xevb referenc e design and may vary with source impedance and design changes. in most systems, an exact value is not important. however, to calculate for a different source impedance and/or design: 1. drive antenna input with desired source impedance (via antenna or antenna dummy). 2. increase rf level until agc index changes from 19 to 20. record last rf level with index equal 19. 3. increase rf level until agc index reaches 39. record rf level with index equal 39. 4. replace ?5600? in rate equation with ?(rf39 ? rf19)/0.00667?. available in: si4740/41/42/43/44/45 default: 0x0004 step: 4 range: 4?248 notes: 1. was property 0x4102 in fw2.c. 2. for fw2.e, attack rate may be faster than progra mmed depending on initial and final rf levels. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 00000000 attack [7:0] agc attack rate (db/s) 5600 attack 7:0 ?? -------------------------------------- - =
an332 166 rev. 1.0 property 0x3703. am_agc_release_rate sets the agc release rate. larger values provide slower release, and smaller values provide faster release. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read in powerup mode. the default is 140 (approximately 40 db/s). nominal "5600" is based on silabs ' am antenna dummy and si474xevb referenc e design and may vary with source impedance and design changes. in most systems, an exact value is not important. however, to calculate for a different source impedance and/or design: 1. drive antenna input with desired source impedance (via antenna or antenna dummy). 2. increase rf level until agc index changes from 19 to 20. record last rf level with index equal 19. 3. increase rf level until agc index reaches 39. record rf level with index equal 39. 4. replace "5600" in rate equation with "(rf39 ? rf19)/0.00667". available in: si4740/41/42/43/44/45 default: 0x008c step: 4 range:4?248 note: was property 0x4103 in fw2.c. property 0x3705. am_f rontend_agc_control adjusts the am agc for external front-end attenuator and external front-end cascode lna. this property contains two fields: min_gain_index and attn_backup. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 0x130c (min_agc_index=19 a nd attn_backup=12). available in: si4740/41/42/43/44/45 default: 0x130c min_gain_index impacts sensitivity a nd u/d performance. lower values im prove sensitivity, but degrade far away blocker u/d performance. [note: values below 19 have minimal sensitivity improvement.] higher values degrade sensitivity, but improve u/d. with min_ga in_index=19 and si4743 evb re ference design, the si474x provides sensitivity of 28dbuv typical and u/d exceedin g 55db on far away blockers. with min_gain_index=24, the si474x provides sensitivity of 34dbuv typica l and u/d approaching 70db on far away blockers. the recommended min_gain_index optimization procedure is: 1. determine source impedance and am antenna dummy. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000000000 release [7:0] bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name min_gain_index[7:0] attn_backup[7:0] agc release rate (db/s) 5600 release[7:0] ----------------------------------------- =
an332 rev. 1.0 167 2. determine sensitivity rf in put and sinad requirements. 3. set frequency to 1000khz. 4. with source impedance in #1 and rf input in #2, adjust min_gain_index until sinad requirements are achieved with minimum necessary margin. 5. program this value into si474x min_gain_index as part of init ialization after powerup command. attn_backup insures the agc gain inde xes are monotonic and is used when the external attenuator is engaged via gpo1/agc2. the actual attenuation achieved depen ds on the source impedance or am antenna dummy. since agc gain implementation is subject to change, the optimum value is best determined with specific antenna and board design. the recommend attn_backup opt imization procedure is: 1. determine source impedance and am antenna dummy. 2. determine maximum rf input and associated sinad requirements. 3. set frequency to 1710khz. 4. with attn_backup set to 12 (default), disabl e the agc at amagcndx=47 using am_agc_override command. 5. with source impedance in #1 and rf input in #2, adj ust attenuator impedance until sinad requirements are achieved with minimum necessary margin. for si4743ev b rev 1.3, c7 (1200pf) attenuates against passive antenna sources and r8 (1 ohm) attenuates against active (50 ohm) sources. 6. enable the agc using am_agc_override. 7. sweep the rf input from 0 to 126 dbuv and then from 126 to 0 dbuv in 1 db steps and observe the amagcndx at each rf level using am_agc_status command. 8. if amagcndx is observed to oscillate at any rf leve l, increase attn_backup by 1 and repeat from step 7. 9. if amagcndx is observed not to oscillate at any rf level, decrease attn_backu p by one and repeat from step 7. 10. add one to smallest attn_backup fo r which no oscillations ar e observed and program th is value into si474x attn_backup as part of initialization after powerup command. table 16. recommended values for min_gain_i ndex and attn_backup with fw2.e and later, si4743evb rev 1.3 and various am antenna dummies am antenna dummy min_gain_index attn_backup 50 ? /15 pf/62 pf (silabs) 19 12 50 ? /40 pf/40 pf 19 12 50mn series 19 12 active (50 ? ) 19 20
an332 168 rev. 1.0 property 0x3900. am_nb_detect_threshold sets the threshold for detecting impulses in db above the noise floor. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read in powerup mode. the default is 12 db. available in: si4742/43/44/45 default: 0x000c range: 0?90 note: was property 0x4105 in fw2.c. property 0x3901. am_nb_interval interval in micro-seconds that original samples are re placed by sample-hold clean samples. the cts bit (and optional interrupt) is set when it is safe to send the next co mmand. this property may only be set or read in powerup mode. the default is 55 s. available in: si4742/43/44/45 default: 0x0037 range: 15?110 note: was property 0x4106 in fw2.c. property 0x3902. am_nb_rate noise blanking rate in 100 hz units. the cts bit (and optiona l interrupt) is set when it is safe to send the next command. this property may only be set or re ad in powerup mode. the default is 64 (6400 hz). available in: si4742/43/44/45 default: 0x0040 range: 1?64 note: was property 0x4107 in fw2.c. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name nb_detect_threshold [15:0] bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name nb_interval [15:0] bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name nb_rate [15:0]
an332 rev. 1.0 169 property 0x3903. am_nb_iir_filter sets the bandwidth of the noise floor estimator. the cts bi t (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read in powerup mode. the default is 300 (465 hz). bandwidth (hz) = nb_iir_filter[15:0] x 1.55 available in: si4742/43/44/45 default: 0x012c range: 300?1600 note: was property 0x4108 in fw2.c. property 0x3904. am_nb_delay delay in micro-seconds before applying impulse blanking to the original samples. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read in powerup mode. the default is 172 s. available in: si4742/43/44/45 default: 0x00ac range: 125?219 note: was property 0x4109 in fw2.c. bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name nb_iir_filter [15:0] bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name nb_delay [15:0]
an332 170 rev. 1.0 figure 14. am noise blanker property 0x4000. rx_volume sets the audio output volume. the cts bit (and optional interr upt) is set when it is safe to send the next command. this property may only be set or read w hen in powerup mode. the default is 63. available in: all default: 0x003f step: 1 range: 0?63 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 0000000000 vol[5:0] bit name function 15:6 reserved always write to 0. 5:0 vol output volume. sets the output volume level, 63 max, 0 min. default is 63. time time time blanker input blanker output lpf iir output am_nb_detect_threshold am_nb_interval am_nb_rate : sets maximum repeat rate nb is allowed to fire. am_nb_iir_filter : adjusts lpf am_nb_delay
an332 rev. 1.0 171 property 0x4001. rx_hard_mute mutes the audio output. l and r audio outputs may not be muted independently. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is unmute (0x0000). available in: all default: 0x0000 bit d15d14d13d12d11d10d9d8d7d6d5d4d3 d2 d1 d0 name 0000000 000000 0lmutermute bit name function 15:2 reserved always write to 0. 1 lmute mutes both l and r audio outputs. 0 rmute mutes both l and r audio outputs.
an332 172 rev. 1.0 5.4. commands and properties for th e wb receiver (si 4707/36/37/38/39/42/43) the following two tables are the summary of the comm ands and properties for the weather band receiver component applicable to si4707/36/37/38/39/42/43. table 17. wb receiver command summary cmd name description available in 0x01 power_up power up device and mode selection. all 0x10 get_rev returns revision information on the device. all 0x11 power_down power down device. all 0x12 set_property sets the value of a property. all 0x13 get_property retrieves a property?s value. all 0x14 get_int_status reads interrupt status bits. all 0x15 patch_args* reserved command used for patch file down- loads. all 0x16 patch_data* reserved command used for patch file down- loads. all 0x50 wb_tune_freq selects the wb tuning frequency. all 0x52 wb_tune_status queries the status of previous wb_tune_freq or wb_seek_start command. all 0x53 wb_rsq_status queries the status of the received signal quality (rsq) of the current channel all 0x54 wb_same_status retrieves specific ar ea message encoding (same) information and acknowledges sameint interrupts. si4707 0x55 wb_asq_status queries the status of the 1050 khz alert tone in weather band. all 0x57 wb_agc_status queries the current agc settings all 0x58 wb_agc_override override agc setting by disabling and forcing it to a fixed value all 0x80 gpio_ctl configures gpo1, 2, and 3 as output or hi-z all 0x81 gpio_set sets gpo1, 2, and 3 output level (low or high) all *note: commands patch_args and patch_data are only used to patch firmware. for information on applying a patch file, see "7.2. powerup from a component patch" on page 216.
an332 rev. 1.0 173 table 18. wb receive property summary prop name description default available in 0x0001 gpo_ien enables inte rrupt sources. 0x0000 all 0x0102 digital_output_ format configure digital audio outputs. 0x0000 si4737/39/43 0x0104 digital_output_ sample_rate configure digital audio output sam- ple rate. 0x0000 si4737/39/43 0x0201 refclk_freq sets frequency of reference clock in hz. the range is 31130 to 34406 hz, or 0 to disable the afc. default is 32768 hz. 0x8000 all 0x0202 refclk_prescale sets the prescaler value for rclk input. 0x0001 all 0x5108 wb_max_tune_error sets the maximum freq error allowed before setting the afc_rail indicator. default value is 10 khz. 0x000a all 0x5200 wb_rsq_int_source configures interrupt related to received signal quality metrics. 0x0000 all 0x5201 wb_rsq_snr_hi_threshold sets high threshold for snr inter- rupt. 0x007f all 0x5202 wb_rsq_snr_lo_threshold sets low threshold for snr inter- rupt. 0x0000 all 0x5203 wb_rsq_rssi_hi_threshold sets high threshold for rssi inter- rupt. 0x007f all 0x5204 wb_rsq_rssi_lo_threshold sets low threshold for rssi inter- rupt. 0x0000 all 0x5403 wb_valid_snr_threshold sets snr threshold to indicate a valid channel 0x0003 all 0x5404 wb_valid_rssi_threshold sets rssi threshold to indicate a valid channel 0x0014 all 0x5500 wb_same_interrupt_source configures same interrupt sources. 0x0000 si4707 0x5600 wb_asq_int_source configures interrupt related to the 1050 khz alert tone 0x0000 all 0x4000 rx_volume sets the output volume. 0x003f all 0x4001 rx_hard_mute mutes the audio output. l and r audio outputs may not be muted independently. 0x0000 all
an332 174 rev. 1.0 table 19. status response for the wb receiver bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x rsqint sameint asqint stcint bit name function 7cts clear to send. 0 = wait before sending next command. 1 = clear to send next command. 6err error. 0=no error 1=error 5:4 reserved values may vary. 3rsqint received signal quality interrupt. 0 = received signal quality measurement has not been triggered. 1 = received signal quality measurement has been triggered. 2sameint same interrupt (si4707 only). 0 = same interrupt has not been triggered. 1 = same interrupt has been triggered. 1asqint audio signal quality interrupt. 0 = audio signal quality measurement has not been triggered. 1 = audio signal quality measurement has been triggered. 0stcint seek/tune complete interrupt. 0 = tune complete has not been triggered. 1 = tune complete interrupt has been triggered.
an332 rev. 1.0 175 5.4.1. wb receiver commands command 0x01. power_up initiates the boot process to move the device from powe rdown to powerup mode. the boot can occur from internal device memory or a system controller downloaded patch. to confirm that the patch is compatible with the internal device library revision, the library re vision should be confirmed by issu ing the power_up command with func = 15 (query library id). the device returns the response , including the library revision, and then moves into powerdown mode. the device can then be placed in powerup mode by issuing the power_up command with func = 3 (wb receive) and the patch may be applied. the power_up command configures the state of rout (pin 13), lout (pin 14) for analog audio mode. for si4743 component 2a or higher, the power_up command also configures the state of gpo3/dclk (pin 19), dfs (pin 18), and dout (pin 17) for digital audio mode. the command configures gpo2/int~ interrupts (gpo2oen) and cts interrupts (ctsien). if both are enabl ed, gpo2/irq is driven high during normal operation and low for a minimum of 1 s during the interrupt. the ctsien bit is duplicated in the gpo_ien property. the command is complete when the cts bit (and optional interrupt) is set. to change function (e.g., wb rx to fm rx), issue powe r_down command to stop cu rrent function; then, issue power_up to start new function. note: delay at least 500 ms between powerup command and first tu ne command to wait for the oscillator to stabilize if xoscen is set and crystal is used as the rclk available in: all command arguments: two response bytes: none (func=3), seven (func=15) command bit d7 d6 d5 d4 d3 d2 d1 d0 cmd 0000000 1 arg1 ctsien gpo2oen patch xoscen func[3:0] arg2 opmode[7:0]
an332 176 rev. 1.0 arg bit name function 1 7 ctsien cts interrupt enable. 0 = cts interrupt disabled. 1 = cts interrupt enabled. 1 6 gpo2oen gpo2 output enable. 0 = gpo2 output disabled. 1 = gpo2 output enabled. 15 patch patch enable. 0 = boot normally 1 = copy nvm to ram, but do not boot. after cts has been set, ram may be patched 1 4 xoscen crystal oscillator enable. 0 = use external rclk (cryst al oscillator disabled) 1 = use crystal oscillator (rclk and gp o3/dclk with exte rnal 32.768khz crystal and opmode = 00000101) see si47xx data sheet application schematic for external bom details. 1 3:0 func[3:0] function. 3=wb receive. 0?2, 4?14 = reserved 15 = query library id. 2 7:0 opmode[7:0] application setting 00000101 = analog audio outputs (lout/rout) 00001011 = digital audio output (dclk, lout/dfs, rout/dio) 10110000 = digital audio outputs (dclk, dfs, dio) (si4743 component 2.a or higher with xoscen = 0) 10110101 = analog and digital outputs (lout/rout and dclk, dfs, dio) (si4743 component 2.a or higher with xoscen = 0)
an332 rev. 1.0 177 response (func = 3, wb receive) response (func = 15, query library id) bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint sameint asqint stcint bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint sameint asqint stcint resp1 pn[7:0] resp2 fwmajor[7:0] resp3 fwminor[7:0] resp4 reserved[7:0] resp5 reserved[7:0] resp6 chiprev[7:0] resp7 libraryid[7:0] resp bit name function 1 7:0 pn[7:0] final 2 digits of part number (hex). 2 7:0 fwmajor[7:0] firmware major re vision (ascii). 3 7:0 fwminor[7:0] firmware minor revision (ascii). 4 7:0 reserved[7:0] reserved, various values. 5 7:0 reserved[7:0] reserved, various values. 6 7:0 chiprev[7:0] chip revision (ascii). 7 7:0 libraryid[7:0] library revision (hex).
an332 178 rev. 1.0 command 0x10. get _ rev returns the part number, chip revision, firmware revision, patch revision and component revision numbers. the command is complete when the cts bit (and optional inte rrupt) is set. this command may only be sent when in powerup mode. available in: all command arguments: none response bytes: eight command response bit d7d6d5 d4 d3 d2 d1 d0 cmd 000 1 0 0 0 0 bit d7d6d5d4d3d2d1d0 status cts err x x rsqint sameint asqint stcint resp1 pn[7:0] resp2 fwmajor[7:0] resp3 fwminor[7:0] resp4 patch h [7:0] resp5 patch l [7:0] resp6 cmpmajor[7:0] resp7 cmpminor[7:0] resp8 chiprev[7:0] resp bit name function 1 7:0 pn[7:0] final 2 digits of part number 2 7:0 fwmajor[7:0] firmware major revision 3 7:0 fwminor[7:0] firmware minor revision 4 7:0 patch h [7:0] patch id high byte 5 7:0 patch l [7:0] patch id low byte 6 7:0 cmpmajor[7:0] component major revision 7 7:0 cmpminor[7:0] component minor revision 8 7:0 chiprev[7:0] chip revision
an332 rev. 1.0 179 command 0x11. power_down moves the device form powerup to powerdo wn mode. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent wh en in powerup mode. note that only the power_up command is accepted in powerdown mode. if the system controller writes a command other than power_up when in powerdown mode, the device does not respond. the device will only respond when a power_up command is written. note: the following describes the state of all the pins when in powerdown mode: gpio1, gpio2, and gpio3 = 0 rout, lout, dout, dfs = hiz. available in: all command arguments: none response bytes: none command response command 0x12. set_property sets a property shown in table 18, ?wb receive property summary,? on page 173. the cts bit (and optional interrupt) is set when it is safe to send the next co mmand. this command may only be sent when in powerup mode. available in: all command arguments: five response bytes: none command bit d7 d6 d5 d4 d3 d2 d1 d0 cmd 000 1 0 0 0 1 bit d7d6d5d4d3d2d1d0 status cts err x x rsqint sameint asqint stcint bit d7 d6 d5 d4 d3 d2 d1 d0 cmd 00010010 arg1 00000000 arg2 prop h [7:0] arg3 prop l [7:0] arg4 propv h [7:0] arg5 propv l [7:0]
an332 180 rev. 1.0 command 0x13. get_property gets a property as shown in table 1 8, ?wb receive property summary,? on page 173. the cts bit (and optional interrupt) is set when it is safe to send the next co mmand. this command may only be sent when in powerup mode. available in: all command arguments: three response bytes: three command arg bit name function 1 7:0 reserved always write to 0. 27:0prop h [7:0] property high byte. this byte in combination with prop l is used to specify th e property to modify. 37:0prop l [7:0] property low byte. this byte in combination with prop h is used to specify the property to modify. 47:0propv h [7:0] property value high byte. this byte in combination with propv l is used to set the property value. 57:0propv l [7:0] property value low byte. this byte in combination with propv h is used to set th e property value. bit d7d6d5d4d3d2d1d0 cmd 00010011 arg1 00000000 arg2 propg h [7:0] arg3 propg l [7:0] arg bit name function 1 7:0 reserved always write to 0. 27:0 propg h [7:0] property high byte. this byte in comb ination with prop l is used to specify the property to get. 37:0 propg l [7:0] property low byte. this byte in combination with prop h is used to specify the property to get.
an332 rev. 1.0 181 response command 0x14. get _ int _ status updates bits 6:0 of the status byte . this command should be called afte r any command that sets the stcint, rsqint, sameint (si4707 only), or asqint bits. when polling this comm and should be periodically called to monitor the status byte, and when us ing interrupts, this command should be called after the interrupt is set to updated the status byte. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. available in: all command arguments: none response bytes: one command response bitd7d6d5d4d3d2d1d0 status cts err x x rsqint sameint asqint stcint resp1 00000000 resp2 propv h [7:0] resp3 propv l [7:0] resp bit name function 1 7:0 reserved always returns 0. 27:0propv h [7:0] property value high byte. this byte in comb ination with propv l will represent the requested property value. 37:0propv l [7:0] property value high byte. this byte in comb ination with propv h will represent the requested property value. bit d7d6d5d4d3d2d1d0 cmd 00010100 bitd7d6d5d4d3d2d1d0 status cts err x x rsqint sameint asqint stcint
an332 182 rev. 1.0 command 0x50. wb_tune_freq sets the wb receive to tune the frequency between 1 62.4 mhz and 162.55 mhz in 2.5 khz units. for example 162.4 mhz = 64960 and 162.55 mhz = 65020. the cts bit (and op tional interrupt) is set when it is safe to send the next command. the err bit (and optional interrupt) is set if an invalid argument is sent. note that only a single interrupt occurs if both the cts and err bits are se t. the optional stc interrupt is set when the command completes. the stcint bit is set only after the get_int_status command is called. this command may only be sent when in powerup mode. the command clears the stc bit if it is already set. available in: all command arguments: three response bytes: none command bit d7d6d5d4d3d2d1d0 cmd 01010000 arg1 00000000 arg2 freq h [7:0] arg3 freq l [7:0] arg bit name function 1 7:0 reserved always write to 0. 27:0freq h [7:0] tune frequency high byte. this byte in comb ination with freq l selects the tune frequency in khz. in wb mode the valid range is from 64960 to 65020 (162.4?162.55 mhz). 37:0freq l [7:0] tune frequency low byte. this byte in comb ination with freq h selects the tune frequency in khz. in wb mode the valid range is from 64960 to 65020 (162.4?162.55 mhz).
an332 rev. 1.0 183 command 0x52. wb_tune_status returns the status of wb_tune_freq. the commands returns the current frequen cy, and rssi/snr at the moment of tune. the command clears the stcint interrupt bit when intack bit of arg1 is set. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. available in: all command arguments: one response bytes: five command response bit d7d6d5d4d3d2d1d0 cmd 01010010 arg1 0000000intack arg bit name function 1 7:1 reserved always write to 0. 10 intack seek/tune interrupt clear. if set this bit clears the seek/tune complete interrupt status indicator. bitd7d6d5d4d3d2d1d0 status cts err x x rsqint sameint asqint stcint resp1 xxxxxxafcrlvalid resp2 readfreq h [7:0] resp3 readfreq l [7:0] resp4 rssi[7:0] resp5 snr[7:0]
an332 184 rev. 1.0 command 0x53. wb_rsq_status returns status information about the received signal qua lity. the commands returns the rssi, snr, and frequency offset. it also indicates whether the frequency is a currentl y valid frequency as indicated by valid, and whether the afc is railed or not as indicated by afcrl. this command can be used to check if the received signal is above the rssi high threshold as reported by rssihint, or below the rssi low threshold as reported by rssilint. it can also be used to check if the received signal is above th e snr high threshold as reported by snrhint, or below the snr low threshold as reported by snrlint. the command clears the stcint interrupt bit when intack bit of arg1 is set. the cts bit (and optional interrupt) is set wh en it is safe to send the next command. this command may only be sent when in powerup mode. available in: all command arguments: one response bytes: seven command data bit name function 1 7:2 reserved always returns 0. 1 1 afcrl afc rail indicator. this bit will be set if the afc rails. 10 valid valid channel. confirms if the tuned channel is currently valid. 2 7:0 readfreq h [7:0] read frequency high byte. this byte in combin ation with readfreq l returns frequency being tuned. 37:0readfreq l [7:0] read frequency low byte. this byte in combi nation with readfreq h returns frequency being tuned. 4 7:0 rssi[7:0] received signal strength indicator. this byte will contain th e receive signal strength at the tune d frequency. 5 7:0 snr[7:0] snr. this byte will contain the snr metric at the tuned frequency. bit d7d6d5d4d3d2d1d0 cmd 01010011 arg1 0000000intack arg bit name function 10 intack interrupt acknowledge 0 = interrupt status preserved. 1 = clears rsqint, snrhint, snrlint, rssihint, rssilint
an332 rev. 1.0 185 response bit d7 d6d5d4d3 d2 d1 d0 status cts err x x rsqint sameint asqint stcint resp1 x xxxsnrhi nt snrlint rssihi nt rssiilint resp2 x xxxx xafcrlvalid resp3 x xxxx x x x resp4 rssi[7:0] resp5 asnr[7:0] resp6 x xxxx x x x resp7 freqoff[7:0] data bit name function 1 3 snrhint snr detect high. 0 = received snr has not exceeded above snr high threshold. 1 = received snr has exceeded above snr high threshold. 1 2 snrlint snr detect low. 0 = received snr has not exceeded below snr low threshold. 1 = received snr has exceeded below snr low threshold. 1 1 rssihint rssi detect high. 0 = rssi has not exceeded above rssi high threshold. 1 = rssi has exceeded above rssi high threshold. 1 0 rssilint rssi detect low. 0 = rssi has not exceeded below rssi low threshold. 1 = rssi has exceeded below rssi low threshold. 2 1 afcrl afc rail indicator. this bit will be set if the afc rails. 2 0 valid valid channel. confirms if the channe l is currently valid. 4 7:0 rssi[7:0] received signal strength indicator. this byte will contain the receive si gnal strength at the tuned frequency. 5 7:0 snr[7:0] snr. this byte will contain the snr metric at the tuned fr equency. 7 7:0 freqoff[7:0] frequency offset. signed frequency offset in khz.
an332 186 rev. 1.0 command 0x54. wb_same_status retrieves same information, acknow ledges sameint interrupts and clears the message buffer. the command indicates whether the start of message, end of message or pr eamble is detected and if the header buffer is ready. the state of the decoder, message length, and 8 bytes of the message buffer with corresponding confidence level is returned. the byte at ad dress 0 will be the first byte following the header block identifier "zczc", typically "-" (dash). each byte has an associated confidence metric ranging from 0 (low confidence) to 3 (high confidence). available in: si4707 command arguments: two response bytes: thirteen command bit d7d6d5d4d3d2d1d0 cmd 01010100 arg1 000000clrbufintack arg2 readaddr[7:0] arg bit name function 1 7:2 reserved always write to 0. 1 1 clrbuf clear buffer 0 = message buffer preserved. 1 = clears the contents of the same message buffer. clears the contents of the same mess age buffer if set. the buffer will always be cleared during wb_tune_freq. if the buffer is not cleared then each message received w ill be combined with the previously received mes- sage to increase the certainty of the message content. after receipt of an end-of-message, this buffer must be cleared by the user. to prevent different headers from being combined into an incorrect message, the user must clear the buffer before a new header is transmi tted. as there is no indication that a new header is about to be transmitted, the user must rely on other events to indicate when to clear the buffer. the buffer should be cleared after receipt of three headers, after the end-of-messa ge marker, when the 1050 hz alert tone has been detected or 6 seconds after the reception of the last header was completed and no new preamble has been detected. once the buffer has been cleared, it will remain empty until th e next start-of-message is received. alternatively, the user may clear the buffer after each header is received and rely on a traditional best 2-of-3 voting method. in this case, no message combining is performed. 10 intack interrupt acknowledge 0 = interrupt status preserved. 1=clears sameint. 2 [7:0] readaddr[7:0] byte in the message buffer to start read ing from. note that 8 bytes will always be returned, however th e wb_same_status:msglen will report the total length of the message and the user must disregard bytes past this length.
an332 rev. 1.0 187 response bit d7d6d5d4 d3 d2 d1 d0 status cts err x x rsqint sameint asqint stcint resp1 xxxxeomdetsomdetpredethd rrdy resp2 state[7:0] resp3 msglen[7:0] resp4 conf7[1:0] conf6[1:0] conf5[1:0] conf4[1:0] resp5 conf3[1:0] conf2[1:0] conf1[1:0] conf0[1:0] resp6 data0[7:0] resp7 data1[7:0] resp8 data2[7:0] resp9 data3[7:0] resp10 data4[7:0] resp11 data5[7:0] resp12 data6[7:0] resp13 data7[7:0] resp bit name function 1 3 eomdet end of message detected 1 = end of message is detected. 1 2 somdet start of message detected 1 = start of message is detected. 1 1 predet preamble detected 1 = preamble is detected. 1 0 hdrrdy header buffer ready 1 = header buffer is ready. 2 [7:0] state[7:0] state machine status 0 = end of message. 1 = preamble detected. 2 = receiving same header message. 3 = same header message complete. 3 [7:0] msglen[7:0] same message length same message length in bytes. this length excludes the preamble and the header code block identifier "zczc". if message combining is used, the value reported is the length of the longest message received.
an332 188 rev. 1.0 4 [7:6] conf7[1:0] confidence metric for data7 r epresented as a number between 0 (low) and 3 (high). 4 [5:4] conf6[1:0] confidence metric for data6 r epresented as a number between 0 (low) and 3 (high). 4 [3:2] conf5[1:0] confidence metric for data5 r epresented as a number between 0 (low) and 3 (high). 4 [1:0] conf4[1:0] confidence metric for data4 r epresented as a number between 0 (low) and 3 (high). 5 [7:6] conf3[1:0] confidence metric for data3 r epresented as a number between 0 (low) and 3 (high). 5 [5:4] conf2[1:0] confidence metric for data2 r epresented as a number between 0 (low) and 3 (high). 5 [3:2] conf1[1:0] confidence metric for data1 r epresented as a number between 0 (low) and 3 (high). 5 [1:0] conf0[1:0] confidence metric for data0 r epresented as a number between 0 (low) and 3 (high). 6 [7:0] data0[7:0] byte of message read at address, readaddr + 0 7 [7:0] data1[7:0] byte of message read at address, readaddr + 1 8 [7:0] data2[7:0] byte of message read at address, readaddr + 2 9 [7:0] data3[7:0] byte of message read at address, readaddr + 3 10 [7:0] data4[7:0] byte of message read at address, readaddr + 4 11 [7:0] data5[7:0] byte of message read at address, readaddr + 5 12 [7:0] data6[7:0] byte of message read at address, readaddr + 6 13 [7:0] data7[7:0] byte of message read at address, readaddr + 7 resp bit name function
an332 rev. 1.0 189 command 0x55. wb_asq_status returns status information about the 1050khz alert tone in weather band. the commands returns the alert on/off interrupt and the present state of the alert tone. the co mmand clears the asqint bit wh en intack bit of arg1 is set. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. available in: all command arguments: one response bytes: two command response bit d7d6d5d4d3d2d1d0 cmd 01010101 arg1 0000000intack arg bit name function 1 7:1 reserved always write to 0. 10 intack interrupt acknowledge 0 = interrupt status preserved. 1 = clears asqint, alertoff_int, alerton_int bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint sameint asqint stcint resp1 x x x x x x alertoff_int alerton_int resp2 xxxx x x x alert
an332 190 rev. 1.0 command 0x57. wb_agc_status returns the agc setting of the device. the command returns whether the agc is enabled or disabled. this command may only be sent when in powerup mode. available in: all command arguments: none response bytes: one command response data bit name function 1 1 alertoff_int alertoff_int. 0 = 1050 hz alert tone has not been de tected to be absent since the last wb_tune_freq or wb_rsq_status with intack = 1. 1 = 1050 hz alert tone has been detect ed to be absent since the last wb_tune_freq or wb_rsq_status with intack = 1. 1 0 alerton_int alerton_int. 0 = 1050 hz alert tone has not been de tected to be present since the last wb_tune_freq or wb_rsq_status with intack = 1. 1 = 1050 hz alert tone has been detect ed to be present since the last wb_tune_freq or wb_rsq_status with intack = 1. 2 0 alert alert. 0 = 1050 hz alert tone is currently not present. 1 = 1050 hz alert tone is currently present. bitd7d6d5d4d3d2d1d0 cmd 01010111 bit d7 d6 d5 d4 d3 d2 d1 d0 status cts err x x rsqint sameint asqint stcint resp1 x x x x x x x read_rfagcdis resp bit name function 1 0 read_rfagcdis this bit indicates whether the rf agc is disabled or not 0 = rf agc is enabled. 1 = rf agc is disabled.
an332 rev. 1.0 191 command 0x58. wb_agc_override overrides agc setting by disabling the agc and forcing the lna to have a certain gain that ranges between 0 (minimum attenuation) and 26 (maximum attenuation). this command may only be sent when in powerup mode. available in: all command arguments: one response bytes: none command response bitd7d6d5d4d3d2d1 d0 cmd 0101100 0 arg1 xxxxxxxrfagcdis arg bit name function 1 7:1 reserved always write to 0. 1 0 rfagcdis this bit selects whether the rf agc is disabled or not 0 = rf agc is enabled. 1 = rf agc is disabled. bitd7d6d5d4d3d2d1d0 status cts err x x rsqint sameint asqint stcint
an332 192 rev. 1.0 command 0x80. gpio_ctl enables output for gpo1, 2, and 3. gpo1, 2, and 3 can be configured for output (hi-z or active drive) by setting the gpo1oen, gpo2oen, and gpo3oen bit. the state (h igh or low) of gpo1, 2, and 3 is set with the gpio_set command. to avoid excessive current consumption due to oscillation , gpo pins should not be left in a high impedance state. the cts bit (and optional interrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. the default is all gpo pins set for high impedance. notes: 1. the use of gpo2 as an inte rrupt pin will override this gpio_ctl function for gpo2. 2. gpo1 is not configurable as an output for si4740/41/42/43/44/45. available in: all command arguments: one response bytes: none command response bitd7d6d5d4d3d2d1d0 cmd 10000000 arg1 0 0 0 0 gpo3oen gpo2oen gpo1oen 0 arg bit name function 1 7:4 reserved always write 0. 1 3 gpo3oen gpo3 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 2 gpo2oen gpo2 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 1 gpo1oen gpo1 output enable. 0 = output disabled (hi-z) (default). 1 = output enabled. 1 0 reserved always write 0. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x rsqint sameint asqint stcint
an332 rev. 1.0 193 command 0x81. gpio_set sets the output level (high or low) for gpo1, 2, and 3. gp o1, 2, and 3 can be configured for output by setting the gpo1oen, gpo2oen, and gpo3oen bit in the gpio_ctl command. to avoid excessive current consumption due to oscillation, gpo pins should not be left in a high impedance state. the cts bit (and optional interrupt) is set when it is safe to send the next command. this prop erty may only be set or read when in powerup mode. the default is all gpo pins set for high impedance. available in: all command arguments: one response bytes: none command response bit d7 d6d5d4 d3 d2 d1 d0 cmd 10000001 arg1 0 0 0 0 gpo3level gpo2level gpo1level 0 arg bit name function 1 7:4 reserved always write 0. 1 3 gpo3level gpo3 output level. 0 = output low (default). 1 = output high. 1 2 gpo2level gpo2 output level. 0 = output low (default). 1 = output high. 1 1 gpo1level gpo1 output level. 0 = output low (default). 1 = output high. 1 0 reserved always write 0. bit d7d6d5 d4 d3 d2 d1 d0 status cts err x x rsqint sameint asqint stcint
an332 194 rev. 1.0 5.4.2. wb receiver properties property 0x0001. gpo_ien configures the sources for the gpo2/irq interrupt pin. valid sources are the lower 8 bits of the status byte, including cts, err, rsqint, sameint (si4707 only), asq int, and stcint bits. the corresponding bit is set before the interrupt occurs. the cts bit (and optional interr upt) is set when it is safe to send the next command. the cts interrupt enable (ctsien) can be set with this property and the power_up command. the state of the ctsien bit set during the power_up command can be read by reading the this property and modified by writing this property. this command may only be sent when in powerup mode. errata: rsqien is non-function al on wb component 2.0. available in: all default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 0000 rsqrep samerep asqrep stcrep ctsien errien 00 rsqien sameien asqien stcien bit name function 15:12 reserved always write to 0. 11 rsqrep rsq interrupt repeat. 0 = no interrupt generated when rsqint is already set (default). 1 = interrupt generated even if rsqint is already set. 10 samerep same interrupt repeat (si4707 only). 0 = no interrupt generated when sameint is already set (default). 1 = interrupt generated even if sameint is already set. 9asqrep asq interrupt repeat. 0 = no interrupt generated when asqint is already set (default). 1 = interrupt generated even if asqint is already set. 8 stcrep stc interrupt repeat. 0 = no interrupt generated when stcint is already set (default). 1 = interrupt generated even if stcint is already set. 7ctsien cts interrupt enable. after powerup, this bi t will reflect the ctsien bit in arg1 of powerup command. 0 = no interrupt generated when cts is set. 1 = interrupt generat ed when cts is set. 6 errien err interrupt enable. 0 = no interrupt generated when err is set (default). 1 = interrupt generat ed when err is set. 5:4 reserved always write to 0.
an332 rev. 1.0 195 property 0x0102. digital_output_format configures the digital audio output format. configuration options include dclk edge, data format, force mono, and sample precision. available in: si4737/39/43 default: 0x0000 note: digital_output_format is supported in wbrx component 3.0 or later. 3rsqien rsq interrupt enable 0 = no interrupt generated when rsqint is set (default). 1 = interrupt generated when rsqint is set. 2 sameien same interrupt enable (si4707 only). 0 = no interrupt generated when sameint is set (default). 1 = interrupt generated when sameint is set. 1 asqien asq interrupt enable 0 = no interrupt generated when asqint is set (default) 1 = interrupt generated when asqint is set 0stcien seek/tune complete interrupt enable. 0 = no interrupt generated when tcint is set (default) 1 = interrupt generated when tcint is set bit 15141312111098 7 6543 2 1 0 name 00000000ofall omode[3:0] omono osize[1:0] bit name function 15:8 reserved always write to 0. 7ofall digital output dclk edge. 0 = use dclk rising edge 1 = use dclk falling edge 6:3 omode[3:0] digital output mode. 0000 = i 2 s 0110 = left-justified 1000 = msb at second dclk after dfs pulse 1100 = msb at first dclk after dfs pulse 2omono digital output mono mode. 0 = use mono/stereo blend (per blend thresholds) 1 = force mono 1:0 osize[1:0] digital output audio sample precision. 0 = 16-bits 1 = 20-bits 2 = 24-bits 3=8-bits bit name function
an332 196 rev. 1.0 property 0x0104. digital_output_sample_rate enables digital audio output and configures digital audio output sample rate in samples per second (sps). when dosr[15:0] is 0, digital audio output is disabled. the over-sampling rate must be set in order to satisfy a minimum dclk of 1 mhz. to enable digital audio output, program dosr[15:0] with the sample rate in samples per second. the system controller must establish dclk and dfs prior to enabling the digital audio output else the device will not respond and will require reset. the sample rate must be set to 0 before the dclk/dfs is removed. wb_tune_freq command must be sent after the power_up command to start the internal clocking before setting this property. note: digital_ouptut_sample_rate is support ed in wbrx component 3.0 or later. available in: si4737/39/43 default: 0x0000 (digital audio output disabled) units: sps range: 32?48 ksps, 0 to disable digital audio output bit 1514131211109876543210 name dosr[15:0] bit name function 15:0 dosr[15:0] digital output sample rate. 32?48 ksps. 0 to disable digital audio output.
an332 rev. 1.0 197 property 0x0201. refclk_freq sets the frequency of the refclk from the output of the prescaler. the refclk range is 31130 to 34406 hz (32768 5% hz) in 1 hz steps, or 0 (to disable afc). fo r example, an rclk of 13 mhz would require a prescaler value of 400 to divide it to 32500 hz refclk. the refer ence clock frequency property would then need to be set to 32500 hz. rclk frequencies between 31130 hz and 40 mhz are supported, however, t here are gaps in frequency coverage for prescaler values ranging from 1 to 10, or frequencies up to 311300 hz. the following table summarizes these rclk gaps. figure 15. refclk prescaler the rclk must be valid 10 ns before and 10 ns after completing the wb_tune_freq command. in addition, the rclk must be valid at all times when the carrier is enab led for proper agc operation. the rclk may be removed or reconfigured at other times. the cts bit (and optional inte rrupt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. the default is 32768 hz. available in: all default: 0x8000 (32768) units: 1 hz step: 1 hz range: 31130-34406 table 20. rclk gaps prescaler rclk low (hz) rclk high (hz) 1 31130 34406 2 62260 68812 3 93390 103218 4 124520 137624 5 155650 172030 6 186780 206436 7 217910 240842 8 249040 275248 9 280170 309654 10 311300 344060 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name refclkf[15:0] rclk refclk pin 9 prescaler divide by 1-4095 31.130 khz ? 40 mhz 31.130 khz ? 34.406 khz
an332 198 rev. 1.0 property 0x0202. refclk_prescale sets the number used by the prescaler to divide the exte rnal rclk down to the internal refclk. the range may be between 1 and 1023 in 1 unit steps. for example, an rclk of 13mhz would require a prescaler value of 400 to divide it to 32500 hz. the reference clock frequency property would then need to be set to 32500 hz. the rclk must be valid 10 ns before and 10 ns after completing the wb_tune_freq command. in addition, the rclk must be valid at all times when the carrier is enabled for proper afc operation. the rclk may be removed or reconfigured at other times. the cts bit (and optional interr upt) is set when it is safe to send the next command. this command may only be sent when in powerup mode. the default is 1. available in: all default: 0x0001 step: 1 range: 1-4095 bit name function 15:0 refclkf[15:0] frequency of reference clock in hz. the allowed refclk frequency range is between 31130 and 34406 hz (32768 5%), or 0 (to disable afc). bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name 000 rclk sel refclkp[11:0] bit name function 15:13 reserved always write to 0. 12 rclksel rclksel. 0 = rclk pin is clock source. 1 = dclk pin is clock source. 11:0 refclkp[11:0] prescaler for reference clock. integer number used to divide clock frequency down to refclk frequency. the allowed refclk frequency range is between 31130 and 34406 hz (32768 +/- 5%), or 0 (to disable afc).
an332 rev. 1.0 199 property 0x5108. wb_max_tune_error sets the maximum freq error allowed before setting the af c_rail indicator.the cts bit (and optional interrupt) is set when it is safe to send the next command. this prope rty may only be set or read when in powerup mode. the default is 10 khz. available in: all default: 0x000a units: khz step: 1 range: 0?15 property 0x5200. wb_rsq_int_source configures interrupt related to received signal quality metrics. the cts bit (and optional inte rrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 0. available in: all default: 0x0000 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name wbmaxtuneerr[15:0] bit name function 15:0 wbmaxtuneerr wb maximum tuning frequency error. maximum tuning error allowed before setting the afc rail indicator on. specified in units of khz. default is 10 khz. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name xxxxxxxxxxxx snrhien snrlien rssihien rssilien
an332 200 rev. 1.0 property 0x5201. wb_rsq_snr_hi_threshold sets high threshold which will trigger the rsq interrupt if the au dio snr is above this th reshold. the cts bit (and optional interrupt) is set when it is sa fe to send the next command. this property may only be set or read when in powerup mode. the default is 127 db. available in: all default: 0x007f units: db step: 1 range: 0-127 bit name function 3 snrhien interrupt source enable: audio snr high. enable snr high as the source of interrupt which the threshold is set by wb_rsq_snr_hi_threshold. 2 snrlien interrupt source enable: audio snr low. enable snr low as the as the source of interrupt which the threshold is set by wb_rsq_snr_l o_threshold. 1 rssihien interrupt source enable: rssi high. enable rssi high as the source of in terrupt which the threshold is set by wb_rsq_rssi_hi_threshold. 0 rssilien interrupt source enable: rssi low. enable rssi low as the source of in terrupt which the threshold is set by wb_rsq_rssi_l o_threshold. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name snrh[15:0] bit name function 15:0 snrh wb rsq audio snr high threshold. threshold which will trig ger the rsq interrupt if the audi o snr is above this threshold. specified in units of db in 1 db steps (0?127). default is 127 db.
an332 rev. 1.0 201 property 0x5202. wb_rsq_snr_lo_threshold sets low threshold which will trigger t he rsq interrupt if the audio snr is be low this threshold. the cts bit (and optional interrupt) is set when it is sa fe to send the next command. this property may only be set or read when in powerup mode. the default is 0 db. available in: all default: 0x0000 units: db step: 1 range: 0-127 property 0x5203. wb_rsq_rssi_hi_threshold sets high threshold which will trigger the rsq interrupt if the rssi is abo ve this threshold. the cts bit (and optional interrupt) is set when it is sa fe to send the next command. this property may only be set or read when in powerup mode. the default is 127 db. available in: all default: 0x007f units: dbv step: 1 range: 0-127 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name snrl[15:0] bit name function 15:0 snrl wb rsq audio snr low threshold. threshold which will trigger the rsq interrupt if the audio sn r is below this threshold. specified in units of db in 1 db steps (0?127). default is 0 db. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name rssih[15:0] bit name function 15:0 rssih wb rsq rssi high threshold. threshold which will trigger th e rsq interrupt if the rssi is above this threshold. specified in units of db in 1 db steps (0?127). default is 127 db.
an332 202 rev. 1.0 property 0x5204. wb_rsq_rssi_lo_threshold sets low threshold which will trigger the rsq interrupt if the rssi is below this threshold. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is 0 db. available in: all default: 0x0000 units: dbv step: 1 range: 0-127 property 0x5403. wb_valid_snr_threshold sets the snr threshold which the wb_rsq_status and wb_tune_status w ill consider the channel valid if the received snr is at or above this value. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 3 db. available in: all default: 0x0003 units: dbv step: 1 range: 0-127 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name rssil[15:0] bit name function 15:0 rssil wb rsq rssi low threshold. threshold which will trigger th e rsq interrupt if the rssi is below this threshold. specified in units of db in 1 db steps (0?127). default is 0 db. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name wb_valid_snr_threshold[15:0] bit name function 15:0 wb_valid_s nr_thresh old wb valid snr threshold. snr value at or above which wb_r sq_status and wb_tune_status will consider the channel valid. specified in unit s of db in 1 db steps (0?127). default is 3db.
an332 rev. 1.0 203 property 0x5404. wb_valid_rssi_threshold sets the rssi threshold which the wb_rsq_status an d wb_tune_status will consid er the channel valid if the received rssi is at or above this value. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 20 db. available in: all default: 0x0014 units: dbv step: 1 range: 0-127 property 0x5500. wb_same_interrupt_source configures the same interrupt sources. the cts bit (and optional interrupt) is set when it is safe to send the next command. this property may only be set or read when in powerup mode. the default is 0. available in: si4707 default: 0x0000 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name wb_valid_rssi_threshold [15:0] bit name function 15:0 wb_valid_rssi_ threshold wb valid rssi threshold. rssi value at or above which wb_rsq_s tatus and wb_tune_status will consider the channel valid. specified in units of db in 1 db steps (0?127). default is 20 db. bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name 00000000 0000 eomdet somdet predet hdrrdy bit name function 15:4 reserved always write to 0. 3 eomdet enable eomdet as the source of same interrupt. 2 somdet enable somdet as the source of same interrupt. 1 predet enable predet as th e source of same interrupt. 0 hdrrdy enable hdrrdy as the source of same interrupt.
an332 204 rev. 1.0 property 0x5600. wb_asq_int_source configures interrupt related to the 1050 khz alert tone. the ct s bit (and optional interrupt) is set when it is safe to send the next command. this property may only be se t or read when in powerup mode. the default is 0. available in: all default: 0x0000 property 0x4000. rx_volume sets the audio output volume. the cts bit (and optional interr upt) is set when it is safe to send the next command. this property may only be set or read w hen in powerup mode. the default is 63. available in: all default: 0x003f step: 1 range: 0-63 bit d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name xxxxxxxxxxxxxx alertoff_ien alerton_ien bit name function 1 alertoff_ien interrupt source enable: alert off. enable 1050 khz alert tone disappeared as the source of interrupt. 0 alerton_ien interrupt source enable: alert on. enable 1050 khz alert tone appeared as the source of interrupt. bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2d1d0 name vol[15:0] bit name function 15:0 vol output volume. sets the output volume level, 63 max, 0 min. default is 63.
an332 rev. 1.0 205 property 0x4001. rx_hard_mute mutes the audio output. l and r audio outputs may not be muted independently. the cts bit (and optional interrupt) is set when it is safe to send the next command. this proper ty may only be set or read when in powerup mode. the default is unmute (0x0000). available in: all default: 0x0000 bit d15d14d13d12d11d10d9d8d7d6d5d4d3d2 d1 d0 name 0000000 0000000lmutermute bit name function 15:2 reserved always write to 0. 1 lmute mutes both l and r audio outputs. 0 rmute mutes both l and r audio outputs.
an332 206 rev. 1.0 6. control interface the bus mode is selected by sampling the state of the gpo1 and gpo2/int pins on the rising edge of rst . the gpo1 pin includes a 1 m ? internal pull-up resistor that is connected while rst is low, and the gpo2/int pin includes an internal 1 m ? pull-down resistor that is connected while the rst pin in low. therefore, it is only necessary for the system contro ller to actively drive pins if a mode othe r than the default 2-wire mode is required, as shown in table 21. after bus mode selection is co mplete, the device is placed in powerdown mode. the minimum setup time for gpo1 and gpo2 before rst = 1 is 30 ns when actively driven by the system controller and 100 s if the internal 1 m ? resistor is allowed to se t the default gpo1 (high) an d gpo2 (low). refer to the si471x data sheet for specific reset timing requirements. in powerdown mode, all circuitry is disabled except for the device contro l interface. the device comes out of powerdown mode when the power_up command is written to the command register. once in powerup mode, the device accepts additional commands, such as tuning, and the setting of properties, such as power level. the device will not accept commands wh ile in powerdown mode, with the e xception of the powerup command. if the system controller writes a command other than power_up when in powerdown mode, the device does not respond, and a reset is required. setting the rst pin low places the device in reset mode. in reset mode, all circuitry is disabled including the device control interface; registers are set to their default settings, and the control bus is disabled. 6.1. 2-wire control interface mode figures 16 and 17 show the 2-wire control interfac e read and write timing parameters and diagrams, respectively. refer to the si471x da ta sheet for timing parameter values. figure 16. 2-wire control interface read and write timing parameters table 21. bus mode selection bus mode gpo2/int gpo1 3-wire 0 0 (must drive) spi 1 (must drive) 1 2-wire 0 1 sclk 70% 30% sdio 70% 30% start start stop t f:in t r:in t low t high t hd:sta t su:sta t su:sto t sp t buf t su:dat t r:in t hd:dat t f:in, t f:out
an332 rev. 1.0 207 figure 17. 2-wire control interface read and write timing diagram 2-wire bus mode uses only the sclk and sdio pins for signaling. a transaction begins with the start condition, which occurs when sdio falls while sclk is high. next, the system controller dr ives an 8-bit cont rol word serially on sdio, which is captured by the device on rising edges of sclk. the control word consists of a seven-bit device address followed by a read/write bit (read = 1, write = 0) . the device acknowledges the control word by driving sdio low on the next falling edge of sclk. although the device responds to only a single devic e address, this address can be changed with the sen pin (note that the sen pin is not used for signaling in 2-wire mode). when sen = 0, the seven-bit device address is 0010001b. when sen = 1, the address is 1100011b. for write operations, the system controller next sends a data byte on sdio, which is captured by the device on rising edges of sclk. the device acknowledges each data byte by driving sdio low for one cycle on the next falling edge of sclk. the system controller may write up to 8 data bytes in a single 2-wire tran saction. the first byte is a command, and the next seven bytes are arguments. writing more than 8 bytes results in unpredictable device behavior. for read operations, after the device ha s acknowledged the control byte, it will drive an eight-bit data byte on sdio, changing the state of sdio on the falling edges of sclk. the system controlle r acknowledges ea ch data byte by driving sdio low for one cycle on the next falling edge of sclk. if a data by te is not acknowledged by the system controller, the transaction will end. the system controller may read up to 16 data bytes in a single 2-wire transaction. these bytes contain the status byte and response data from the device. a 2-wire transaction ends with the stop condition, which occurs when sdio rises while sclk is high. table 22 demonstrates the command an d response procedure implemented in the system controller to use the 2- wire bus mode. in this example the tx _tune_freq command is demonstrated. table 22. command and response procedure - 2-wire bus mode action data description cmd 0x30 tx_tune_freq arg1 0x00 arg2 0x27 set station to 101.1 mhz arg3 0x7e (0x277e = 10110 with 10 khz step size) status ? 0x80 reply status. clear-to-send high. sclk sdio start stop address + r/w ack data ack data ack a6-a0, r/w d7-d0 d7-d0
an332 208 rev. 1.0 to send the tx_tune_freq command and arguments, the system controller sends the start condition, followed by the 8-bit control word, which consis ts of a seven-bit device address (0010001b sen = 0 or 1100011b sen = 1) and the write bit (0b) indicated by ad dr+w = 00100010b = 0x22. in this example, sen = 0 resulting in the control word addr+w = 00100010b = 0x22. if instead sen = 1, the resulting control word would be addr+w = 11000110b = 0xc6. the device acknowledges the control word by setting sdio = 0, indicated by ack = 0. the system controller then sends the cmd byte , 0x30, and again the device acknowledges by setting ack = 0. the system controller and device repeat this pr ocess for the arg1, arg2, and arg3 bytes. commands may take up to seven argument byte s, and this flexibility should be designed into the 2-wire bus mode implementation. alternatively, all seven argument byte s may be sent for all commands, but unusual arguments must be 0x00. unpredictable device behavior will result if more than seven arguments are sent. to read the status and response from the device, the sys tem controller sends the start condition, followed by the eight-bit control word, which consists of the seven bi t device address and the read bit (1b). in this example, sen = 0 and the write control word is addr+r = 00100011b = 0x23. if sen = 1, the write control word would be addr+r = 11000111b = 0xc7. the device acknowledges the control word by setting ack = 0. next the system controller reads the status byte. in this example, the stat us byte is 0x00, indicating that the cts bit, bit 8, has not been set. the response bytes are not ready for reading and that the device is not ready to accept another command. the system controller sets sdio = 1, indicated by nack = 1, to signal to the device the 2-wire transfer will end. the system cont roller should set the stop cond ition. this process is rep eated until the status byte indicates that cts bit is set, 0x80 in this example. when the status byte returns cts bit set, 0x80 in th is example, the system controller may read the response bytes from the device. the co ntroller sets ack = 0 to indica te to the device that additi onal bytes will be read. the resp1 byte is read by the system controller, follo wed by the system controller se tting ack = 0. this is repeated for resp2. resp3 is read by the syste m controller followed by the system controller setting nack = 1, indicating that resp3 is the last byte to be read. the system co ntroller then sets the stop condition. responses may be up to 15 bytes in length (resp1?resp15) depending on the command. it is acceptable to read all 15 response bytes. however, unused response bytes return random data and must be ignored. note that the tx_tune_freq command returns only the status byte and response bytes are shown only for completeness. start addr+w ack cmd ack arg1 ack arg2 ack arg3 ack stop start 0x22 00x30 00x00 00x27 00x7e 0stop start addr+r ack status nack stop start 0x23 0 0x00 1 stop start addr+r ack status ack resp1 ack resp2 ack resp3 nack stop start 0x23 0 0x80 0 0x00 0 0x00 0 0x00 1 stop
an332 rev. 1.0 209 6.2. 3-wire control interface mode figures 18 and 19 show the 3-wire control interfac e read and write timing parameters and diagrams, respectively. refer to the si471x da ta sheet for timing parameter values. figure 18. 3-wire control interface write timing parameters figure 19. 3-wire control interface read timing parameters 3-wire bus mode uses the sclk, sdio and sen pins. a transaction begins when the system controller drives sen low. next, the system controller drives a 9-bit control wo rd on sdio, which is captured by the device on rising edges of sclk. the control word is comprised of a th ree bit chip address (a7:a5 = 101b), a read/write bit (write = 0, read = 1), the chip address (a4 = 0) , and a four bit register address (a3:a0). for write operations, the control word is followed by a 16-bit da ta word, which is captur ed by the device on rising edges of sclk. for read operations, the control word is followed by a delay of one-half sclk cycle for bus turn- around. next, the device drives the 16-bit read data wo rd serially on sdio, changing the state of sdio on each rising edge of sclk. for read operations, the control word is followed by a delay of one-half sclk cycle for bus turn-around. next, the device drives the 16-bit read data word serially on sdio, changing the state of sdio on each rising edge of sclk. a transaction ends when the system controller sets sen = 1, then pulses sclk high and low one final time. sclk may either stop or continue to toggle while sen is high. in 3-wire mode, commands are sent by first writing each argument to register(s) 0xa1?0xa3, then writing the co mmand word to register 0xa0. a response is retrieved by reading registers 0xa8?0xaf. sclk 70% 30% sen 70% 30% sdio a7 a0 70% 30% t s t s t hsdio t hsen a6-a5, r/w, a4-a1 address in data in d15 d14-d1 d0 t high t low ? cycle bus turnaround sclk 70% 30% sen 70% 30% sdio 80% 20% t hsdio t cdv t cdz address in data out a7 a0 a6-a5, r/w, a4-a1 d15 d14-d1 d0 t s t s t hsen
an332 210 rev. 1.0 in 3-wire mode, the control registers are accessed as 16-b it entities (2 byte). in table 23, the full 8-bit 3-wire address is shown, including the chip?s fixed base addr ess (a7:a4 = 1010b). the first two bytes in a command stream uses register command1. the cmd byte occupies register command1[15:8], while arg1 occupies register command1[7:0]. commands with an odd number of bytes must have the lower 8 bits of the register containing the final argument byte filled with 0x00. regi sters which are not specified by the command must either not be written, or must be filled wi th 0x0000 (user's discretion). writing register command1 causes th e command to execute. as a consequence, all re gisters containing applicable argument bytes must be written (in any order) prior to writing register command1. for example, w hen sending the set_property command, write registers command2..command3 first, then register command1. note that arg1 is part of register command1 and must be written at the same time as cmd. the contents of register s status/response1..response8 are not valid until the cts bit (status/re sponse1[15]) is set. r esponse1[13:8] is updat ed after sending the get_int_status command. response bytes which are no t specified in the response byte stream are not guaranteed to be 0x00 and should be ignored. for ex ample, get_property has 4 bytes of response data in registers response1..response2. the contents of registers response3..r esponse8 are meaningless and not guaranteed to be 0x0000. likewise, for commands wh ich have an odd number of response bytes, or a single status byte, the least significant byte (bits 7:0) of the final register is meani ngless, and not guaranteed to be 0x00. table 24 demonstrates the command an d response procedure implemented in the system controller to use the 3- wire bus mode. in this example the tx _tune_freq command is demonstrated. table 23. register map for 3-wire mode 3w addr name d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 a0h command1 cmd arg1 a1h command2 arg2 arg3 a2h command3 arg4 arg5 a3h command4 arg6 arg7 a4h reserved1 reserved reserved a5h reserved2 reserved reserved a6h reserved3 reserved reserved a7h reserved4 reserved reserved a8h status/ response1 cts err rsdin t rdsin t asqin t stcin t resp1 a9h response2 resp2 resp3 aah response3 resp4 resp5 abh response4 resp6 resp7 ach response5 resp8 resp9 adh response6 resp10 resp11 aeh response7 resp12 resp13 afh response8 resp14 resp15 table 24. command and response procedure - 3-wire bus mode action data description cmd 0x30 tx_tune_freq. arg1 0x00 arg2 0x27 set station to 101.1 mhz arg3 0x7e (0x277e = 10110 with 10 khz step size) status ? 0x80 reply status. clear-to-send high.
an332 rev. 1.0 211 to send the tx_tune_freq command and arguments, the system controller sets sen = 0. next, the controller drives the 9-bit control word on sd io, consisting of the device address (a7:a5 = 101b), the write bit (0b), the device address (a4 = 0), and the regi ster address for the command2 regist er (a3:a0 = 0001b). the control word is followed by a 16-bit data word, consisting of arg2 followed by arg3. the system controller then sets sen =1 and pulses the sclk high and then low one final time . for commands requiring additional arguments, in the command3 (arg3, arg4) and command 4 (arg5, arg6) registers, the system controller would send these next. next the system controller initiates the command by setting sen = 0 and driving the 9-bit control word on sdio, consisting of the device address (a7:a5 = 101b), the writ e bit (0b), the device address (a4 = 0), and the register address for the command1 register (a3:a0 = 0000b). th e control word is followed by a 16-bit data word, consisting of the cmd byte followed by arg1 byte. the system controller then sets sen = 1 and pulses the sclk high and then low one final time. to read the status and response from the device, the system controller sets sen = 0. next, the controller drives the 9-bit control word 101101000b on sdio, consisting of th e device address (a7:a5 = 101b), the read bit (1b), the device address (a4 = 0), and the regi ster address for the status/respon se1 register (a3:a0 = 1000b). the control word is followed by a 16-bit data word, c onsisting of status followed by response1. the system controller then sets sen = 1 and pulses the sclk high and then low one final time. in this example, the status byte is 0x00, indicating that the cts bit, bit 8, has not been set and that the response bytes are not ready for reading and that the device is not ready to accept another command. resp1 will be ra ndom until the cts bit is set. this process should be repeated until the status byte indicates that cts bit is set, 0x80 in this example. when the status byte indicates that the cts bit has been set, 0x80 in this example, the system controller may read the response bytes from the device in any order. sen ctl arg2 arg3 sen sclk 1 ? 0 101000001b 0x27 0x7e 0 ? 1pulse sen ctl cmd arg1 sen sclk 1 ? 0 101000000b 0x30 0x00 0 ? 1pulse sen ctl status resp1 sen sclk 1 ? 0 101101000b 0x00 0x00 0 ? 1pulse sen ctl status resp1 sen sclk 1 ? 0 101101000b 0x80 0x00 0 ? 1pulse
an332 212 rev. 1.0 6.3. spi control interface mode figures 20 and 21 show the spi control interface read and write timing parameters and diagrams, respectively. refer to the si471x data shee t for timing parameter values. figure 20. spi control interface write timing parameters figure 21. spi control interface read timing parameters spi bus mode uses the sclk, sdio and sen pins for read/write operations. t he system controller can choose to receive read data from the device on either sdio or gpo1. a transaction begins when the system controller drives sen = 0. the system controller then pulses sclk eight times, while driving an 8-bit cont rol byte serially on sdio. the device captures the data on rising edges of sclk . the control byte must have one of five values: ? 0x48 = write a command (controller dr ives 8 additional bytes on sdio) ? 0x80 = read a response (device drives one additional byte on sdio) ? 0xc0 = read a response (device drives 16 additional bytes on sdio) ? 0xa0 = read a response (device drives one additional byte on gpo1) ? 0xe0 = read a response (device drives 16 additional bytes on gpo1) for write operations, the system controller must drive ex actly 8 data bytes (a command and arguments) on sdio after the control byte. the data is captured by the device on the rising edge of sclk. sclk 70% 30% sen 70% 30% sdio c7 c0 70% 30% t s c6 ?c1 control byte in 8 data bytes in d7 d6 ?d1 d0 t s t hsdio t high t low t hsen bus turnaround sclk 70% 30% sen 70% 30% sdio or gpo1 70% 30% t hsdio control byte in c7 c0 c6 ?c1 t s t hsen t s t cdz t cdv 16 data bytes out d7 d6 ?d1 d0
an332 rev. 1.0 213 for read operations, the controller must read exactly one byte (status) after the control byte or exactly 16 data bytes (status and resp1?resp15) after the control byte . the device changes the state of sdio (or gpo1, if specified) on the falling edge of sclk. da ta must be captured by the system co ntroller on the rising edge of sclk. keep sen low until all bytes have transferred. a transaction may be aborted at any time by setting sen high and toggling sclk high and then low. co mmands will be ignored by the device if the tr ansaction is aborted. table 25 demonstrates the command and response procedure that would need to be im plemented in the system controller to use the spi bus mode. in this example the tx_tune_freq command is demonstrated. to send the tx_tune_freq command and arguments, the system controller sets sen = 0, sends the control byte 0x48, followed by the cmd byte and seven ar gument bytes, arg1-arg7, followed by setting sen = 1. note that all seven argument byte s must be sent by the controller or the command will fail. unus ed arguments must be written as 0x00. to read the status and response from the device, the system controller sets sen = 0 and sends the control byte 0x80 to read the response on sdio (or the control byte 0xa0 to read the response on gpo1). next the system controller reads the status byte. in this example, the stat us byte is 0x00, indicating that the cts bit, bit 8, has not been set and that the response bytes are not ready for reading. the device is not ready to accept another command. the system controller sets sen = 1 to end the transfer. this process should be repeated until the status byte indicates that cts bi t is set, 0x80 in this example. when the status byte indicates that the cts bit has been set, 0x80 in this example, the system controller may read the response bytes from the device. to read the st atus and response from the device, the system controller sets sen = 0 and sends the control byte 0xc0 to read the response on sdio (or the control byte 0xe0 to read the response on gpo1). note that all 16 response bytes mu st be read from the device. unused response bytes are random and should be ignored. note that the tx_tune_freq command returns only the status byte and resp1?resp15 bytes are show n only for completeness. table 25. command and response procedure - spi bus mode action data description cmd 0x30 tx_tune_freq arg1 0x00 arg2 0x27 set station to 101.1 mhz arg3 0x7e (0x277e = 10110 with 10 khz step size) status ? 0x80 reply status. clear-to-send high. sen ctl cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 sen 1 ? 0 0x48 0x30 0x00 0x27 0x7e 0x00 0x00 0x00 0x00 0 ? 1 sen ctl status sen 1 ? 00x80 0x00 0 ? 1 sen ctl status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 resp13 resp14 resp15 sen 1 ? 0 0xc0 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0 ? 1
an332 214 rev. 1.0 7. powerup there are two procedures for booting the device to move it from powerdown mode to the powerup mode. the first and most common is a boot from internal device memory . the second is a boot from a firmware patch that is written from the system controller to the device. to power up the device: 1. supply vdd and vio while keeping the rst = 0. the minimum vdd and vio rise time is 25 s, and vdd and vio must be stable 250 s before setting rst =1. power supplies may be sequenced in any order. rst is in the vio supply domain and therefore rst = 0 must be maintained before vio is supplied. 2. set gpo1 and gpo2 for the desired bus mode. the minimum setup time for gpo1 and gpo2 before rst = 1 is 30 ns when actively driven by the system controller and 100 s if the internal 1 m ? resistor is allowed to set the de fault gpo1 (high) and gpo2 (low). 3. set rst =1. 4. write power_up to the command register. the power_up command instructs the device to boot fr om internal memory, see section ?7.1. powerup from device memory?, or from a firmware patch sent from the system controlle r, see section ?7.2. powerup from a component patch?. after cts = 1, the device is ready to commence normal operation and accept additional commands. the power_up command configures the state of din (pin 13), dfs (pin 14), and rin (pin 15 on si471x/2x) and lin (pin 16 on si471x/2x) for analog or digital audio modes and gpo2/int for interrupt operation. prior to this command these pins are se t to high impedance. the gpio_ctl and gpio_set commands configure the state of gpo2/int and gpo3. pr ior to this command these pins are set to high impedance. 5. provide rclk. note that the rclk buffer is in the vio supply domain and may therefore be supplied at any time after vio is supplied. the rclk must be valid 10 ns before any command that enable s the tx carrier, such as the tx_tune_freq command, and for 10 ns after any comma nd that disables the carrier, such as the tx_tune_power command with a value of 0x00. the rclk is required for proper agc operation when the carrier is enabled. the rclk may be removed or reconfigured when the carrier is disabled. figure 22. device power up timing vdd vio rstb control bus power_up command rclk tx_tune freq command > 250 us > 25 us > 10 ns > 10 ns
an332 rev. 1.0 215 7.1. powerup from device memory 1. send the power_up command by writing the cmd field with value 0x01. 2. send argument 1 of the power up command 0x02 (no patch, cts and gpo2 interrupts disabled, fm transmit selected). optionally various interrupts such as the cts interrupt can be enabled by varying this argument, see section ?5. commands and properties?. 3. send argument 2 of the power up command 0x50 (analog input selected) 4. poll the cts bit until it has been set high, or until a ct s interrupt is received if cts interrupt is enabled. 1. send the power_up command by writing the cmd field with value 0x01. 2. send arg1, 0x00 (no patch, cts and gpo2 interrupt s disabled, fm receive selected). optionally various interrupts such as the cts interrupt can be enabled by varying this argument, see section ?5. commands and properties?. 3. send arg2, 0x05 (analog output is selected) 4. poll the cts bit until it has been set high, or until a ct s interrupt is received (if cts interrupt is enabled). 1. send the power_up command by writing the cmd field with value 0x01. 2. send arg1, 0x01 (no patch, cts and gpo2 interrupt s disabled, am/sw/lw receive selected). optionally various interrupts such as the cts interrupt can be enabled by varying this argument, see section ?5. commands and properties?. 3. send arg2, 0x05 (analog output selected) 4. poll the cts bit until it has been set high, or until a ct s interrupt is received (if cts interrupt is enabled). table 26. using the power_up command for the fm transmitter action data description cmd 0x01 power_up arg1 0x02 set to fm transmit. arg2 0x50 set to analog line input. resp1 ? 0x80 reply status. clear-to-send high. table 27. using the power_up command for the fm receiver action data description cmd 0x01 power_up arg1 0x00 set to fm receive. arg2 0x05 set to analog out. status ? 0x80 reply status. clear-to-send high. table 28. using the power_up command for the am/sw/lw receiver action data description cmd 0x01 power_up arg1 0x01 set to am/sw/lw receive. arg2 0x05 set to analog out. status ? 0x80 reply status. clear-to-send high.
an332 216 rev. 1.0 1. send the power_up command by writing the cmd field with value 0x01. 2. send arg1, 0x03 (no patch, cts and gpo2 interrupts disabled, weather band receive selected). optionally various interrupts such as the cts interrupt can be enabled by varying this argument. see section ?5. commands and properties?. 3. send arg2, 0x05 (analog output selected). 4. poll the cts bit until it has been set high or until a cts interrupt is received (if cts interrupt is enabled). 7.2. powerup from a component patch the device has the ability to receive com ponent patches from the system controller to modify sections or all of the device memory. 7.2.1. patching capabilities in order to support interim updates to the device component, patches can be applied to the component by the system controller via a downlo ad mechanism. patches can be provided by silicon lab oratories to customers to address field issues, errata, or adjust device behavior. patc hes are unique to a particular device firmware version and cannot be generated by customers. patches can be used to replace a portion of the component (to address errata for example) or to download an entirely new component image (to allow a customer to test a new component release on their device prior to receiving programmed parts). patches are tagged with a unique identification to allow them to be tracked and are encrypted requiring the customer to use a tag when downloading to allow the si47xx to decrypt the patch. prior to downloading a partial patch, th e user must confirm that the device c ontains the correct firmware and library to support the patch. 7.2.1.1. examples an fm transmitter component patch for si471x firmware 2.0 with library r4 does not support si471x firmware 1.0 with library r0. for a programmatic indication, the power_up command ca n be used to confirm the device library and firmware version. for a visual indication, the marking on the device can be used to confirm the firmware version. tables 30 through 35 summarize the library a nd firmware mappi ng and compatibility. table 29. using the power_up command for the fm transmitter action data description cmd 0x01 power_up arg1 0x03 set to weather band receive. arg2 0x05 set to analog out. status ? 0x80 reply status. clear-to-send high. table 30. si4704/05 firmware, library, and component compatibility part # firmware library fmrx component si4704/05-b20 2.0 r8 2.0 si4704/05-c40 4.0 r10 5.0 si4704/05-d50 5.0 r11 7.0 si4704/05-d60 6.0 r11 7.0
an332 rev. 1.0 217 table 31. si4706 firmware, library, and component compatibility part # firmware library fmrx component si4706-b20 2.0 r8 3.0 si4706-c30 3.0 r10 5.1 si4706-d50 5.0 r11 7.0 table 32. si4707 firmware, library, and component compatibility part # firmware library wbrx component si4707-b20 2.0 r9 1.0 table 33. si4710/11/12/13 firmware, library, and component compatibility part # firmware library fmtx component si4710-a10 1.0 r0 1.0 si4710/11/12/13-a20 2.0 r4 2.0 si4710/11/12/13-b30 3.0 r8 3.0 si4710/11/12/13-b31 3.1 r8 3.1 table 34. si4720/21 firmware, library, and component compatibility part # firmware library fmtx component fmrx component si4720-a10 1.0 r4 2.0 1.0 si4720/21-b20 2.0 r8 3.0 2.0 table 35. si4730/31 firmware, library, and component compatibility part # firmware library fmrx component am_sw_lw rx component si4730-a10 1.0 r4 1.0 1.0 si4730/31-b20 2.0 r9 2.0 2.0 si4730/31-c40 4.0 r10 6.0 5.0 si4730/31-d50 5.0 r11 7.0 6.0 si4730/31-d60 6.0 r11 7.0 6.0 table 36. si4740/41/42/43/44/45 firmware, library, and component compatibility part # firmware library fmrx component amrx component wbrx component si4740/41-c10 1.0 r10 4.0 3.0 n/a si4742/43-c10 1.0 r10 4.0 3.0 3.0 si4744/45-c10 1.0 r10 4.0 3.0 n/a
an332 218 rev. 1.0 table 37. si4749 firmware, library, and component compatibility part # firmware library fmrx component si4749-c10 1.0 r10 4.0 table 38. si4734/35 firmware, library, and component compatibility part # firmware library fm rx component am_sw_lwrx component si4734/35-b20 2.0 r9 2.0 2.1 si4734/35-c40 4.0 r10 6.0 5.0 si4734/35-d50 5.0 r11 7.0 6.0 si4734/35-d60 6.0 r11 7.0 6.0 table 39. si4736/37 firmware, library, and component compatibility part # firmware library fmrx component am_sw_lwrx component wbrx component si4736/37-b20 2.0 r9 2.0 2.0 1.0 si4736/37-c40 4.0 r10 6.0 5.0 5.0 table 40. si4738/39 firmware, library, and component compatibility part # firmware library fmrx component wbrx component si4738/39-b20 2.0 r9 2.0 1.0 si4738/39-c40 4.0 r10 6.0 5.0 table 41. si4784/85 firmware, library, and component compatibility part # firmware library fmrx component si4784/85-b20 2.0 r8 2.0 si4784/85-d50 5.0 r11 7.0
an332 rev. 1.0 219 7.2.2. patching procedure patching is accomplished by sending a series of comman ds to the device. these commands are sent in the same manner as any other device commands and can be sent over any of the command buss es (2-wire, 3-wire, spi). the first command that is sent to the device is the po wer_up command to confirm th at the patch is compatible with the internal device library revision. the device mo ves into the powerup mode, returns the reply, and moves into the powerdown mode. the power_up command is sent to the device again to configure the mode of the device and additionally is used to start the patching pr ocess. when applying the patch, the patch bit in arg1 of the power_up command must be set to 1 to begin the patching process. once the power_up command is sent and the device is plac ed in patch mode, the patch file can be sent to the device. the patch file typically has a .csg extension. it is formatted into 8 columns, consisting of a leading command (0x15 or 0x16), and 7 arguments. the controlling system must send each line of 8 bytes, wait for a cts, then send the next set of 8, etc., until the entire patch has been sent. an example showing the first few lines and final line of a patch file is shown below. the patch download mechanism is verified with a c hecksum embedded in the patch download. if the checksum fails, the part issues an error code, err (bit 6 of the one byte reply that is available after each 8-byte transfer), and halts. the part must be reset to recover from this error condition. the following is an example of a patch file. # copyright 2006 silicon laboratories, inc. # patch generated 21:09 august 09 2006 # fmtx version 0.0 alpha 0x15,0x00,0x0b,0x1d,0xbb,0x14,0xc4,0xa1 0x16,0x98,0x81,0xd9,0x71,0xed,0x0e,0xac . . [up to 1979 additional lines] . . 0x15,0x00,0x00,0x00,0x00,0x00,0x49,0xfd a full memory patch requires 15856 bytes of system cont roller memory, however, most patches require significantly less memory. in 2-wire mode, a full memory patch do wnload requires approximately 500 ms at a 400 khz clock rate. the following is an example of the commands requir ed to boot the device from powerdown mode using the patch file in the previous example. the device has completed the boot process when the cts bit is set high after the last byte in the file is tran sferred and is ready to accept addi tional commands and proceed with normal operation. table 42 provides an example of usin g the power_up command with patching enabled. the table is broken into three columns. the first column lists the action taking place: command (cmd), argument (arg), status (status) or response (resp). the seco nd column lists the data byte or bytes in hexadecimal that are being sent or received. an arrow preceding the data indicates data being sent from the device to the system controller. the third column describes the action.
an332 220 rev. 1.0 table 42. example power_up command with patching enabled action data description cmd arg1 arg2 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 0x01 0xcf 0x50 ? 0x80 ? 0x0d ? 0x32 ? 0x30 ? 0x00 ? 0x00 ? 0x41 ? 0x04 power_up set to read library id, enable interrupts. set to analog line input. reply status. clear-to-send high. part number, hex (0x0d = si4713) firmware major rev, ascii (0x32 = 2) firmware minor rev, ascii (0x30 = 0) reserved reserved chip rev, ascii (0x41 = reva) library id, hex (0x04 = library 4) cmd arg1 arg2 status 0x01 0xe2 0x50 ? 0x80 power_up set to fm transmit, set patc h enable, enable interrupts. set to analog line input. reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x15 0x00 0x0b 0x1d 0xbb 0x14 0xc4 0xa1 ? 0x80 reserved for patch. reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x16 0x98 0x81 0xd9 0x71 0xed 0x0e 0xac ? 0x80 reserved for patch. reply status. clear-to-send high. . . [up to 1979 additional lines] . cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x15 0x00 0x00 0x00 0x00 0x00 0x49 0xfd ? 0x80 reserved for patch. reply status. clear-to-send high.
an332 rev. 1.0 221 8. powerdown the procedure for moving the device from powerup to powerdown modes requires writing the power_down command. to power down the device and remove vdd and vio (optional): 1. write tx_tune_power to the command register to disable the carrier. 2. set rclk = 0 (optional). note that the rclk buffer is in the vio supply domain and may therefore be supplied at any time that vio is supplied. the rclk must be va lid 10 ns before and 10 ns after sending the tx_tune_measure, tx_tune_freq, and tx_tune_power commands. in addi tion, the rclk must be valid at all times when the carrier is enabled for proper agc operation. the rc lk may be removed or reconfigured at other times. the rclk is required for proper agc operation when the carrier is enabled. the rclk may be removed or reconfigured when the carrier is disabled. 3. write power_down to the command register. note that all register contents will be lost. 4. set rst =0. note that rst must be held high for 10 ns after th e completion of the power_down command. 5. remove vdd (optional). 6. remove vio (optional). note that vio must not be removed without removing vdd. unexpected device operation may result. figure 23. device power down timing table 43. using the power_down command action data description cmd status 0x11 ? 0x80 power_down reply status. clear-to-send high. vdd vio rstb control bus rclk power_down command tx_tune power command > 10 ns > 10 ns
an332 222 rev. 1.0 9. digital audio interface the digital audio interface operates in slave mode and supports 3 different audio data formats: ? i 2 s ? left-justified ? dsp mode in i 2 s mode, the msb is captured on the second rising edge of dclk following each dfs transition. the remaining bits of the word are sent in order down to the lsb. the left channel is transferred first when the dfs is low, and the right channel is transferred when the dfs is high. in left-justified mode, the msb is captured on the firs t rising edge of dclk following each dfs transition. the remaining bits of the word are sent in order down to the lsb. the left channel is transferred first when the dfs is high, and the right channel is transferred when the dfs is low. in dsp mode, the dfs becomes a pulse with a width of 1 dclk period. the left channel is transferred first, followed right away by the right channel. there are two op tions in transferring the digital audio data in dsp mode: the msb of the left channel can be transferred on the firs t rising edge of dclk following the dfs pulse or on the second rising edge. in all audio formats, depending on the word size, dclk frequency and sample rates, there may be unused dclk cycles after the lsb of each word before the ne xt dfs transition and msb of the next word. the number of audio bits can be configured for 8, 16, 20, or 24 bits. figure 24. i 2 s digital audio format figure 25. left-justified digital audio format figure 26. dsp digital audio format left channel right channel 1 dclk 1 dclk 13 2n n-1 n-2 13 2n n-1 n-2 lsb msb lsb msb dclk din/dout dfs inverted dclk (ifall = 1) (ifall = 0) i2s (imode = 0000) left channel right channel 13 2n n-1 n-2 13 2 n n-1 n-2 lsb msb lsb msb dclk din/dout dfs inverted dclk (ifall = 1) (ifall = 0) left-justified (imode = 0110) 13 2n n-1 n-2 n n-1 n-2 lsb msb lsb msb dclk din/dout (msb at 1 st rising edge) dfs 13 2 left channel right channel 1 dclk (ifall = 0) (imode = 1100) 13 2n n-1 n-2 n n-1 n-2 lsb msb lsb msb 13 2 left channel right channel din/dout (msb at 2 nd rising edge) (imode = 1000)
an332 rev. 1.0 223 there are two additional properties ea ch for fm transmitter and am/fm/sw/lw receiver associated with using digital audio input/output. note that digita l audio is not supported in wb receiver. for fm transmitter: 1. property 0x0101: digital_input_format 2. property 0x0103: digital_input_sample_rate for am/fm/sw/lw receiver: 1. property 0x0102: digital_output_format 2. property 0x0104: digital_output_sample_rate the procedure for using a digital audio is as follow: 1. when the device is powered up, the default value for digital_input_sample_rate or digital_output_sample_rate is 0 (disable digital audio in/out). 2. user then must supply dclk and dfs prior to setting the digital_input_sample_rate or digital_output_sample_rate property. 3. this procedure can be applied anyti me after the chip is powered up. 4. user may also change or disable dclk/dfs during oper ation. prior to changing or disabling dclk/dfs, user has to set the digital_input_sample_rate or di gital_output_sample_rate property to 0. after changing or re-enabling dclk/dfs, user t hen can set the sample rate property again. 5. the property digital_input_format and digital_ou tput_format does not have a condition, thus it can be set anywhere after power up. notes: 1. failure to provide dclk and dfs prior to setting the sample rate property may cause the chip to go into an unknown state and user must reset the chip. 2. the digital_input_sample_rate or digital_output_sample_rate is t he audio sampling rate (dfs rate) and is valid between 32 khz and 48 khz. the following table is a programming example of how to use digital audio. table 44. digital audio programming example action data description action: power up chip (look at respective programming example of power up in digital mode). action: user can send other commands or properties here. action: supply dclk and dfs. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x03 or 0x04 0xbb 0x80 0x80 set_property digital_input_sample_rate or digital_output_sample_rate sample rate = 0xbb80 = 48000 hz reply status. clear-to-send high.
an332 224 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x01 or 0x02 0x00 0x00 0x80 set_property digital_input_format or digital_output_format mode: i2s, stereo, 16bit, sample on rising edge of dclk reply status. clear-to-send high. action: user can send other commands or properties here. action: user needs to change or disable dclk/dfs. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x03 or 0x04 0x00 0x00 0x80 set_property digital_input_sample_rate or digital_output_sample_rate sample rate = 0 (disable digital audio) reply status. clear-to-send high. action: user now is allowed to change or disabling dclk/dfs. action: dclk/dfs has been changed or re-enabled. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x03 or 0x04 0xbb 0x80 0x80 set_property digital_input_sample_rate or digital_output_sample_rate sample rate = 0xbb80 = 48000 hz reply status. clear-to-send high. action: user can send other commands or properties here. table 44. digital audio programming example
an332 rev. 1.0 225 10. timing there are two indicators: cts (clear to send) and stc (seek/tune complete) to indicate that a command has been accepted and execution completed by the part. after sending every command, the cts bi t will be set indicating that the command has been accepted by the part and it is ready to receive the next command. the cts bi t, on most commands, also indicates that the command has completed execution. these commands are: 1. power_up, power_down, get_rev, get_property, gpio_ctl, gpio_set 2. on fm transmitter component: tx_tune_status, tx_asq_status, tx_rds_buff, tx_rds_ps 3. on fm receive component: fm_tune_status, fm_rsq_status, fm_rds_status 4. on am/sw/lw receive component: am_tune_status, am_rsq_status 5. on wb receive component: wb_tune_ status, wb_rsq_status, wb_asq_status the cts timing model is shown in figure 27 and the ti ming parameters for each command are shown in table 45. figure 27. cts timing model in addition to cts bit, there are a few commands (e.g . tx_tune_freq or fm_tun e_freq) that use the stc bit to indicate that the command has completed execution. it is highly recommended that user waits for the stc bit before sending the next command. when interrupt is not used, user can poll the status of this stc bit by sending the get_int_status command until the stc bit has been set before sending the next command. commands that use stc bit to indicate execution has been completed: 1. on fm transmitter component: tx_tun e_freq, tx_tune_power, tx_tune_measure 2. on fm receive component: fm_tune_freq, fm_seek_start 3. on am/sw/lw receive componen t: am_tune_freq, am_seek_start 4. on wb receive component: wb_tune_freq the cts and stc timing model is shown in figure 28 an d the timing parameters for each command are shown in table 45. control bus command gpo2/ int t cts t int
an332 226 rev. 1.0 figure 28. cts and stc timing model the set_property command does not have an indicator telling when the command has completed execution, rather the timing is guaranteed and it is called t comp . the cts and set_property command completion timing model t comp is shown in figure 29 and the timing parameters for each command are shown in table 45. figure 29. cts and set_property command complete t comp timing model control bus command gpo2/ int t stc t cts t int t int control bus command gpo2/ int t comp t cts t int
an332 rev. 1.0 227 table 45. command timing parameters for the fm transmitter command t cts t stc t comp t int power_up 110 ms ? ? 1s power_down 300 s ?? get_rev ? ? get_property ? ? get_int_status ? ? patch_args ? ? patch_data ? ? tx_asq_status ? ? tx_rds_buff ? ? tx_rds_ps ? ? tx_tune_status ? ? tx_tune_freq 100 ms ? tx_tune_measure 100 ms ? tx_tune_power 20 ms ? set_property ? 10 ms gpio_ctl ? ? gpio_set ? ?
an332 228 rev. 1.0 table 46. command timing parameters for the fm receiver command t cts t stc t comp t int power_up 110 ms ? ? 1s power_down 300 s ?? get_rev ? ? get_property ? ? get_int_status ? ? patch_args ? ? patch_data ? ? fm_rsq_status ? ? fm_rds_status ? ? fm_tune_status ? ? fm_tune_freq 60 ms 1 ? fm_seek_start 60 ms 2 ? set_property ? 10 ms fm_agc_status ? ? fm_agc_override ? ? gpio_ctl ? ? gpio_set ? ? notes: 1. t stc for fm_tune_freq / fm_seek_start commands is 80 ms on fmrx component 2.0 and earlier. 2. t stc is seek time per channel. total seek time depends on b andwidth, channel spacing, and number of channels to next valid channel. worst case seek time complete for fm_seek_start is: for usa fm: fm_seek_band_top fm_seek_band_bottom ? fm_seek_freq_spacing ------------------------------------------------------------------------------------------------------------------------------- ------------------- ?? ?? 1 + ?? ?? t stc ? ? 20 ----------------------------------- - ?? ?? 1 + ?? ?? 60 ms ? 6.2 s =
an332 rev. 1.0 229 table 47. command timing parameters for the am receiver command t cts t stc t comp t int power_up 110 ms ? ? 1s power_down 300 s ?? get_rev ? ? get_property ? ? get_int_status ? ? patch_args ? ? patch_data ? ? am_rsq_status ? ? am_tune_status ? ? am_tune_freq 80 ms ? am_seek_start 80 ms* ? set_property ? 10 ms gpio_ctl ? ? gpio_set ? ? *note: t stc is seek time per channel. the worst-case seek time per channel is 200 ms.total seek time depends on bandwidth, channel spacing, and number of channels to next valid channel. worst case seek time complete for am_seek_start is: for usa am: am_seek_band_top am_seek_band_bottom ? am_seek_freq_spacing ------------------------------------------------------------------------------------------------------------------------------- -------------------- ?? ?? 1 + ?? ?? t stc ? ? 10 ---------------------------- - ?? ?? 1 + ?? ?? 200 ms ? 24.0 s =
an332 230 rev. 1.0 table 48. command timing parameters for the wb receiver command t cts t stc t comp t int power_up 110 ms ? ? 1s power_down 300 s ?? get_rev ? ? get_property ? ? get_int_status ? ? patch_args ? ? patch_data ? ? wb_rsq_status ? ? wb_asq_status ? ? wb_tune_status ? ? wb_tune_freq 250 ms ? set_property ? 10 ms wb_agc_status ? ? wb_agc_override ? ? gpio_ctl ? ? gpio_set ? ? table 49. command timing parameters for the stereo audio adc mode command t cts t comp t int power_up 110 ms ? 1s power_down 300 s ? get_rev ? get_property ? get_int_status ? aux_asrc_start ? aux_asq_status ? gpio_ctl ? gpio_set ? set_property 10 ms
an332 rev. 1.0 231 11. fm transmitter the fm transmitter audio signal chain involves audio dy namic range control, pre-emphasis and limiter function. understanding what these three function blocks do in the signal chain will help user in maximizing the volume out of the fm transmitter. 11.1. audio dynamic range control for fm transmitter the audio dynamic range control can be used to reduce the dynamic range of the audio signal. audio dynamic range reduction increases the transmit volume by decreasi ng the peak amplitudes of audio signals and increasing the root mean square content of the audi o signal. in other words, it amplifies signals below the threshold by a fixed gain and compresses audio signals above the threshold by the ratio of threshold/(gain + threshold). figure 30 shows an example transfer function of an audio dynamic range controller with the threshold set at ?40 dbfs and a gain = 20 db relative to an un compressed transfer function. figure 30. audio dynamic range transfer function for input signals below the threshold of ?40 dbfs, the output signal is amplified or gained up by 20 db relative to an uncompressed signal. audio inputs above the threshold are compressed by a 2 to 1 db ratio, meaning that every 2 db increase in audio input level above the threshol d results in an audio output increase of 1 db. in this example, the input dynamic range of 90 db is reduced to an output dynamic range of 70 db. the fm transmitter includes digital audio dynamic range control with progra mmable gain, threshold, attack rate, and release rate. the total dynamic range reduction is set by the gain value and the audio output compression above the threshold is equal to threshold/(gain + threshold) in db. the gain spec ified cannot be larger than the absolute value of the threshold. this feature can also be disabled if audio co mpression is not desired. figure 31 shows the time domain characteristics of the audio dynamic range controller. the attack rate sets the speed with which the audio dynamic range controller responds to changes in the input level, an d the release rate sets the speed with which the audio dynamic range controller returns to no compression once the audio input level drops below the threshold. when using the audio dynamic range control, care must be ta ken to configure the device such that the sum of the threshold and gain is zero, or less, as not to distort or overmodulate. 0 ?10 ?20 ?30 ?40 ?50 ?60 input [dbfs] ?70 output [dbfs] threshold = ?40 db m = 1 ?80 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?90 m = 1 gain = 20 db compression 2:1 db no compression
an332 232 rev. 1.0 figure 31. time domain characteristics of the audio dynamic range controller 11.2. audio pre-emphasi s for fm transmitter pre-emphasis and de-emphasis are te chniques used to improve the signal-to-noise ratio of an fm stereo broadcast by reducing the effects of high-frequency noise. a pre-emphasis filter is applied to the broadcast to accentuate the high audio frequencies and a de-emphasi s filter is used by the receiver to attenuate high frequencies and restore a flat frequency response. depending on the region, a time cons tant of either 50 or 75 s is used. the frequency respons e of both of these filters is shown in figure 32. for a 75 s filter, a 15 khz tone is amplified by ~17 db. for a 50 s filter, a 15 khz tone is amplified by ~13.5 db. the pr e-emphasis time constant is programmable to off, 50 or 75 s and is setting the tx_preemphasis property. wh en using the pre-emphasis filter, care must be taken to account for amplification at high frequencies as not to distort or overmodulate. figure 32. pre-emphasis filter response attack time threshold release time audio input audio output preemphasis filter transfer function 0 5 10 15 20 03691215 frequency (khz) db 75 us 50us
an332 rev. 1.0 233 11.3. audio limiter for fm transmitter a limiter is available to prevent over modulation by dynamically attenuating the audio level such that the maximum audio deviation does not exceed the level set by the tx_audio_deviation property. the limiter is useful when trying to maximize the audio volume, minimize receiver-generated distortion and prevent overmodulation that may result in violating fcc and etsi modulation limits. the overmod bit is set by the device when the peak voltage prior to the limiter exceeds the leve l set by the tx_audio_deviation property. when the limiter is enabled, the overmod bit is an indication that the limiter has dynamically attenuated the au dio level. the limiter attack time is instantaneous (within on sa mple period) and the releas e time is adjustable with the tx_limiter_release_time property. note: limiter is enabled by default. 11.4. maximizing audio vo lume for fm transmitter the audio input chain is shown in figure 33: figure 33. audio input chain to maximize audio volume: 1. set the input line attenuation, line level and audio deviation. the input line attenuation should be set to the lowest setting that is above the maximum level provided by the audio source, either 190, 301, 416 or 636 mv pk . the line level should be set to the maximum source audio level plus headroom. when the limiter is enabled, 2 db of headroom is recomme nded. 2 db of headroom is recommended so that the limiter will not be engaged the entire time it is enabled. when the limiter is disabled and 50 s pre-emphasis is selected, 13.5 db of headroom is required. when the limiter is disa bled and 75 s pre-emphasis is selected, 17 db of headroom is required. table 50 summarizes these settings: table 50. line input headroom pre-emphasis limiter on (db) limiter off (db) off 0 0 50 s 0 13.5 75 s 0 17 compressor pga adc pre-emphasis limiter lilevel liatten acen acthresh acattack acrelease acgain preemph limiten inlevel ialdh ialdl overmod from input to modulator
an332 234 rev. 1.0 the audio deviation should be set as high as possible, with the constraint that the sum of the audio, pilot and rds deviation must be 75 khz or less. typical settings are 66.25 khz audio deviation, 6.75 khz pilot deviation and 2 khz rds deviation. example 1: an application providing a 150 mv pk input to the device on rin/lin would set line attenuation = 00, resulting in a maximum permissible input level of 190 mv pk on lin/rin and an input resistance of 396 k ? . with 50 s pre-emphasis and the limiter disabled, the line level would be set to 150 mv pk and the source level would be adjusted down by 13.5 db to 30 mv pk to compensate for pre-emphasis. with the limiter enabled, the input source can be maintained at 150 mv pk , but the line level should be set at 188 mv pk to give 2 db headroom. example 2: an application providing a 1 v pk input to the device on rin/lin would set line attenuation = 11, resulting in a maximum permissible input level of 636 mv pk on lin/rin and an input resistance of 60 k ? . an external series resistor on lin and rin inputs of 58 k ? would create a resistive voltage divider that would keep the maximum line level on rin/lin below 509 mv pk to give a 2 db headroom. with input signal at 509 mv pk , 75 s pre- emphasis and the limiter enabled, the line level can be set to 636 mv pk . 2. enable the audio dynamic range control in general the greater the sum of threshold and gain, the greater the perceived audio volume. the following examples demonstrate minimal and aggressive compre ssion schemes. when using the audio dynamic range control, care must be taken to configur e the device such that the sum of the threshold and gain is zero, or less, as not to distort or overmo dulate. in practice, the sum of the threshold and gain w ill be less than zero to minimize the possibility for distortion. example 1 (minimal compression): setproperty: tx_acomp_threshold = ?40 dbfs setproperty: tx_acomp_attack_time = 5 ms setproperty: tx_acomp_release_time = 100 ms setproperty: tx_acomp_gain = 15 db example 2 (aggressive compression): setproperty: tx_acomp_threshold = ?15 dbfs setproperty: tx_acomp_attack_time = 0.5 ms setproperty: tx_acomp_release_time = 1000 ms setproperty: tx_acomp_gain = 5 db
an332 rev. 1.0 235 12. programming examples this section contains the programming example for each of the function: fm transmit, fm receive, am/sw/lw receive, and wb receive. before each of the example, an overview of how to program the device is shown as a flowchart. silicon labs also provides the actual software (example code) and it can be downloaded from mysilabs.com as an332sw. 12.1. programming example fo r the fm/rds transmitter the following flowchart is an overview of how to program the fm/rds transmitter. reset chip state: power down chip state: power up power up with patch? check chip library id power_up with func=15 (command 0x01) power up with gpo2oen bit enabled (command 0x01) library id compatible w/ patch? power_up with patch and gpo2oen bits enabled (command 0x01) send patch data (command 0x15, 0x16) yes no yes no check chip/fw/comp rev get_rev (command 0x10) chip/fw/comp rev are correct? contact silabs for verification no yes contact silabs for verification
an332 236 rev. 1.0 set fm transmit frequency (command 0x30) use get_int_status (command 0x14) or hardware interrupts until stc bit is set chip state: transmitting set rclk settings (property 0x0201, 0x0202) use interrupt? use all default settings? yes no no set int settings (property 0x0001) yes set gpo (command 0x80, 0x81) yes use gpo? no call tx_tune_status with intack bit set (command 0x33) set transmit power (command 0x31) use get_int_status (command 0x14) or hardware interrupts until stc bit is set call tx_tune_status with intack bit set (command 0x33)
an332 rev. 1.0 237 mono/stereo? transmit rds? (si4711/13/21 only) enable stereo components (property 0x2100) set pilot deviation & freq (property 0x2102, 0x2107) disable stereo components (property 0x2100) stereo mono disable rds components (property 0x2100) set rds deviation (property 0x2103) enable rds components (property 0x2100) set rds properties (property 0x2c00-0x2c07) send rds ps group type0 (command 0x36) send any other rds group type 1-15? send rds group type 1-15 (command 0x35) yes no yes no set audio deviation (property 0x2101)
an332 238 rev. 1.0 preemphasis? enable preemphasis (property 0x2106) disable preemphasis (property 0x2106 = 2) yes no compressor? enable compressor settings (property 0x2200-04) disable compressor (property 0x2200) yes no limiter? enable limiter settings (property 0x2200, 05) disable limiter (property 0x2200) yes no set fm transmit frequency (command 0x30) set transmit power (command 0x31) chip state: transmitting query tx_tune_status (command 0x33) use get_int_status (command 0x14) or hardware interrupts until stc bit is set call tx_tune_status with intack bit set (command 0x33) use get_int_status (command 0x14) or hardware interrupts until stc bit is set call tx_tune_status with intack bit set (command 0x33)
an332 rev. 1.0 239 monitor audio signal quality (asq)? set asq settings (property 0x2300 - 0x2304) query tx_asq_status (command 0x34) optional: mute or unmute audio based on asq status (property 0x2105) want to find an empty channel using rps? (si4712/13/2x only) send tx_tune_measure (command 0x32) do host processing on returned rps value to find empty channels chip state: received (idle) set fm transmit freq and/or power chip state: transmitting yes no yes no loop from start_freq to end_freq until done analog/digital audio input? set analog input settings (0x2104) digital analog enable digital audio by setting dfs sample rate (property 0x0103) clock must be available on dclk/dfs pin set audio format (property 0x0101)
an332 240 rev. 1.0 table 51 provides an example of programming for the fm/rds transmitter. the table is broken into three columns. the first column lists the action taking place: command (cmd), argument (arg), status (status) or response (resp). for set_property commands, th e property (prop) and property data (propd ) are indicated. the second column lists the data byte or bytes in hexadecimal that are being sent or received. an arrow preceding the data indicates data being sent from the device to the system controller. the third column describes the action. note that in some cases the default properties may be acceptable and no modification is necessary. refer to section "5. commands and properties" on page 7 fo r a full description of each command and property. note: if hardware interrupts are required, the gpo2oen flag (0x40 arg1) must be set in the power_up command. change chip function to fm receive? (si472x only) send power_down (command 0x11) yes chip state: power down send power_up for fm receive (command 0x01) chip state: power up (fm receive) look at fm receive flowchart no transmission done? yes send power_down (command 0x11) chip state: power down repeat any of the instructions above after power_up state to change settings no go back to the very first power down state to power up the chip in fm transmit need to change dclk/dfs rate? (digital only) disable digital audio by setting dfs sample rate to 0 (property 0x0103) enable digital audio by setting dfs sample rate (property 0x0103) yes no change dclk/dfs rate or disable dclk/dfs dclk/dfs has been changed or re-enabled
an332 rev. 1.0 241 table 51. programming example for the fm/rds transmitter action data description action: to power up in analog mode, go to ?powerup in analog mode? (bypass ?powerup in digital mode?). powerup in digital mode cmd arg1 arg2 status 0x01 0xc2 0x0f 0x80 power_up (see table 28 for patching procedure) set to fm transmit. enable interrupts. set to digital audio input reply status. clear-to-send high. action: go to ?configuration? (b ypass ?powerup in analog mode? section). powerup in analog mode cmd arg1 arg2 status 0x01 0xc2 0x50 0x80 power_up (see table 28 for patching procedure) set to fm transmit. enable interrupts. set to analog line input reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x04 0x21 0x5e 0x80 set_property tx_line_input_level input range = 419mv pk , 74k ? max peak input level = 350mv pk =0x15e reply status. clear-to-send high configuration cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 0x10 0x00 ? 0x80 ? 0x0d ? 0x32 ? 0x30 ? 0xe4 ? 0xd6 ? 0x32 ? 0x30 ? 0x41 get_rev reply status. clear-to-send high. part number, hex (0x0d = si4713) firmware major rev, ascii (0x32 = 2) firmware minor rev, ascii (0x30 = 0) patch id msb, example only patch id lsb, example only component firmware major rev, ascii (0x32 = 2) component firmware mino r rev, ascii (0x30 = 0) chip rev, ascii (0x41 = reva) cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x00 0x01 0x00 0xc1 ? 0x80 set_property gpo_ien set stcien, errien, ctsien reply status. clear-to-send high.
an332 242 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x02 0x01 0x7e 0xf4 ? 0x80 set_property refclk_freq refclk = 32500 hz reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x02 0x02 0x01 0x90 ? 0x80 set_property rclk_prescale divide by 400 (example rclk = 13 mhz, refclk = 32500 hz) reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x05 0x00 0x00 ? 0x80 set_property tx_line_input_level_mute sets left and right channel mute. reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x06 0x00 0x01 ? 0x80 set_property tx_preemphasis 50 s reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x07 0x4a 0x38 ? 0x80 set_property tx_pilot_frequency sets the pilot or tone generator frequency. reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x01 0x1a 0xa9 ? 0x80 set_property tx_audio_deviation 68.25 khz = 6825d = 0x1aa9 reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 rev. 1.0 243 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x02 0x02 0xa3 ? 0x80 set_property tx_pilot_deviation 6.75 khz = 675d = 0x2a3 reply status. clear-to-send high. tuning cmd arg1 arg2 arg3 arg4 status 0x31 0x00 0x00 0x73 0x00 ? 0x80 tx_tune_power set transmit voltage to 115 dbv = 115d = 0x73 set antenna tuning capacitor to auto. reply status. clear-to-send high. cmd arg1 arg2 arg3 status 0x30 0x00 0x27 0x7e ? 0x80 tx_tune_freq set frequency to 101.1 mhz = 10110d = 0x277e reply status. clear-to-send high. cmd status 0x14 ? 0x81 get_int_status reply status. clear-to-send high. stcint = 1. cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 0x33 0x01 ? 0x80 ? 0x00 ? 0x27 ? 0x7e ? 0x00 ? 0x73 ? 0xab ? 0x00 tx_tune_status clear stc interrupt. reply status. clear-to-send high. frequency = 0x277e = 10110d = 101.1 mhz transmit voltage = 0x73 = 115d = 115 dbv tuning capacitor = 191 (range = 0?191) received noise level = 0x00 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x00 0x00 0x03 ? 0x80 set_property tx_component_enable enable (stereo) lmr and pilot reply status. clear-to-send high. action: in analog mode, go to ?audio dynamic range control (compressor) and limiter? (bypass ?i nput settings in digital mode?). input settings in digital mode action: ensure that dclk and dfs are already supplied. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 244 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x03 0xbb 0x80 0x80 set_property digital_input_sample_rate sample rate = 48000hz = 0xbb80 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x01 0x00 0x00 0x80 set_property digital_input_format mode: i2s, stereo, 16bit, samp le on rising edge of dclk. reply status. clear-to-send high. action: the rest of the program ming is the same as analog. audio dynamic range control (compressor) and limiter cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x22 0x01 0xff 0xd8 ? 0x80 set_property tx_acomp_threshold threshold = ?40 dbfs = 0xffd8 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x22 0x04 0x00 0x0f ? 0x80 set_property tx_acomp_gain gain = 15 db = 0xf reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x22 0x03 0x00 0x04 ? 0x80 set_property tx_acomp_release_time release time = 1000 ms = 4 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x22 0x02 0x00 0x02 ? 0x80 set_property tx_acomp_attack_time attack time = 1.5 ms = 2 reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 rev. 1.0 245 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x22 0x00 0x00 0x03 ? 0x80 set_property tx_acomp_enable enable the limiter and compressor. reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x22 0x05 0x00 0x0d ? 0x80 set_property tx_limiter_release_time sets the limiter release time to 13 (39.38 ms) reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x23 0x01 0x00 0xce ? 0x80 set_property tx_asq_low_level ?50 db = 0x00ce reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x23 0x02 0x27 0x10 ? 0x80 set_property tx_asq_duration_low 10000 ms = 0x2710 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x23 0x03 0x00 0xec ? 0x80 set_property tx_asq_high_level ?20 db = 0x00ec reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x23 0x04 0x13 0x88 ? 0x80 set_property tx_asq_duration_high 5000 ms = 0x1388 reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 246 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x23 0x00 0x00 0x07 ? 0x80 set_property tx_asq_interrupt_select enable overmodulation, high and low thresholds. reply status. clear-to-send high. cmd status 0x14 ? 0x82 get_int_status reply status. clear-to-send high. asqint = 1. note : allow sufficient time after conf iguring audio thresholds before checking status. this example assumes no audio input. cmd arg1 status resp1 resp2 resp3 resp4 0x34 0x01 ? 0x80 ? 0x01 ? 0x27 ? 0x7e ? 0xc9 tx_asq_status clear asqint reply status. clear-to-send high. low flag set. read frequency (msb) read frequency (lsb) input level (dbfs) = 0xc9 = ?55 db received noise level (si4712/13/20/21 only) cmd arg1 arg2 arg3 arg4 status 0x32 0x00 0x27 0x7e 0x00 ? 0x80 tx_tune_measure set frequency to 101.1 mhz = 10110d = 0x277e set antenna tuning capacitor to auto. reply status. clear-to-send high. cmd status 0x14 ? 0x81 get_int_status reply status. clear-to-send high. stcint = 1. cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 0x33 0x01 ? 0x80 ? 0x00 ? 0x27 ? 0x7e ? 0x00 ? 0x00 ? 0xab ? 0x32 tx_tune_status clear stc interrupt. reply status. clear-to-send high. frequency = 0x277e = 10110d = 101.1 mhz transmit voltage = 0x00 = 0 dbv (off) tuning capacitor = 191 (range = 0?191) received noise level = 0x32 = 50d = 50 dbv tuning cmd arg1 arg2 arg3 arg4 status 0x31 0x00 0x00 0x73 0x00 ? 0x80 tx_tune_power set transmit voltage to 115 dbv = 115d = 0x73 set antenna tuning capacitor to auto. reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 rev. 1.0 247 cmd arg1 arg2 arg3 status 0x30 0x00 0x27 0x7e ? 0x80 tx_tune_freq set frequency to 101.1 mhz = 10110d = 0x277e reply status. clear-to-send high. cmd status 0x14 ? 0x81 get_int_status reply status. clear-to-send high. stcint = 1. cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 0x33 0x01 ? 0x80 ? 0x00 ? 0x27 ? 0x7e ? 0x00 ? 0x73 ? 0xab ? 0x32 tx_tune_status clear stc interrupt. reply status. clear-to-send high. frequency = 0x277e = 10110d = 101.1 mhz transmit voltage = 0x73 = 115d = 115 dbv tuning capacitor = 191 (range = 0?191) received noise level = 0x32 (last value) rds (si4711/13/21 only) cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x01 0x19 0xe1 ? 0x80 set_property tx_audio_deviation 66.25 khz = 6625d = 0x19e1 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x03 0x00 0xc8 ? 0x80 set_property tx_rds_deviation (si4711/13/21 only) 2 khz = 200d = 0xc8 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x2c 0x00 0x00 0x01 ? 0x80 set_property tx_rds_interrupt_source (si4711/13/21 only) rds fifo mt reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x2c 0x01 0x40 0xa7 ? 0x80 set_property tx_rds_pi (si4711/13/21 only) sets the rds pi code reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 248 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x2c 0x02 0x00 0x03 ? 0x80 set_property tx_rds_ps_mix (si4711/13/21 only) sets 50% mix of group 1a (program service) and other buffer/fifo groups. reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x2c 0x03 0x10 0x08 ? 0x80 set_property tx_rds_ps_misc (default) (si4711/13/21 only) sets rdsd0 (stereo) and rdsms (music). reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x2c 0x04 0x00 0x03 ? 0x80 set_property tx_rds_ps_repeat_count (si4711/13/21 only) sets program service repeat count to 3. reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x2c 0x05 0x00 0x03 ? 0x80 set property tx_rds_ps_message_count (si4711/13/21 only) sets ps message count to 3. reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x2c 0x06 0xe1 0x02 ? 0x80 set_property tx_rds_ps_af (si4711/13/21 only) sets alternative frequency to 87.7 mhz. reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x2c 0x07 0x00 0x04 ? 0x80 set_property tx_rds_fifo_size (si4711/13/21 only) sets fifo size to 3 blocks (value must be one larger than fifo size). reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 rev. 1.0 249 cmd arg1 arg2 arg3 arg4 arg5 status 0x36 0x00 0x53 0x49 0x4c 0x41 ? 0x80 tx_rds_ps (si4711/13/21 only) psid = 0 set text ?sila? complete text is ?silabs si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 status 0x36 0x01 0x42 0x53 0x20 0x20 ? 0x80 tx_rds_ps (si4711/13/21 only) psid = 1 set text ?bs? complete text is ?silabs si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 status 0x36 0x02 0x53 0x49 0x34 0x37 ? 0x80 tx_rds_ps (si4711/13/21 only) psid = 2 set text ?si47? complete text is ?silabs si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 status 0x36 0x03 0x31 0x58 0x20 0x20 ? 0x80 tx_rds_ps (si4711/13/21 only) psid = 3 set text ?1x? complete text is ?silabs si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 status 0x36 0x04 0x52 0x44 0x53 0x20 ? 0x80 tx_rds_ps (si4711/13/21 only) psid = 4 set text ?rds? complete text is ?silabs si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 status 0x36 0x05 0x44 0x45 0x4d 0x4f ? 0x80 tx_rds_ps (si4711/13/21 only) psid = 5 set text ?demo? complete text is ?silabs si471x rds demo? reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 250 rev. 1.0 cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x06 0x20 0x00 0x53 0x49 0x4c 0x49 ? 0x80 tx_rds_buff (si4711/13/21 only) set ldbuff and mtbuff set group 2a, text location 0 set text ?sili? complete text is ?silicon laboratories si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x04 0x20 0x01 0x43 0x4f 0x4e 0x20 ? 0x80 tx_rds_buff (si4711/13/21 only) set ldbuff set group 2a, text location 1 set text ?con? complete text is ?silicon laboratories si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x04 0x20 0x02 0x4c 0x41 0x42 0x4f ? 0x80 tx_rds_buff (si4711/13/21 only) set ldbuff set group 2a, text location 2 set text ?labo? complete text is ?silicon laboratories si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x04 0x20 0x03 0x52 0x41 0x54 0x4f ? 0x80 tx_rds_buff (si4711/13/21 only) set ldbuff set group 2a, text location 3 set text ?rato? complete text is ?silicon laboratories si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x04 0x20 0x04 0x52 0x49 0x45 0x53 ? 0x80 tx_rds_buff (si4711/13/21 only) set ldbuff set group 2a, text location 4 set text ?ries? complete text is ?silicon laboratories si471x rds demo? reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 rev. 1.0 251 cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x04 0x20 0x05 0x20 0x53 0x49 0x34 ? 0x80 tx_rds_buff (si4711/13/21 only) set ldbuff set group 2a, text location 5 set text ?si4? complete text is ?silicon laboratories si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x04 0x20 0x06 0x37 0x31 0x58 0x20 ? 0x80 tx_rds_buff (si4711/13/21 only) set ldbuff set group 2a, text location 6 set text ?71x? complete text is ?silicon laboratories si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x04 0x20 0x07 0x52 0x44 0x53 0x20 ? 0x80 tx_rds_buff (si4711/13/21 only) set ldbuff set group 2a, text location 7 set text ?rds? complete text is ?silicon laboratories si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x04 0x20 0x08 0x44 0x45 0x4d 0x4f ? 0x80 tx_rds_buff (si4711/13/21 only) set ldbuff set group 2a, text location 8 set text ?demo? complete text is ?silicon laboratories si471x rds demo? reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status 0x35 0x84 0x40 0x01 0xa7 0x0b 0x2d 0x6c ? 0x80 tx_rds_buff (si4711/13/21 only) set fifo and ldbuff set group 4a (real time clock) set time sunday 2/18/2007 12:53 (gmt -6:00) reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 252 rev. 1.0 the device sets the cts bit (and optional interrupt) to in dicate that it is ready to accept the next command. the cts bit also indicates that the power_up, get_ rev, power_down, get_property, get_int_status, and tx_tune_status commands have completed execution. when performing a tx_tune_freq, tx_tune_power, or tx_tune_meas ure cts will indi cate that the device is ready to accept the next command even th ough the operation is not complete. get_int_status or hardware interrupts should be used to query for the stc bit to be set prior to performing other commands. use tx_tune_status to clear the stc bit after it has been set. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x21 0x00 0x00 0x07 ? 0x80 set_property tx_component_enable (si4711/13/21 only) enable (stereo) lmr, pilot and rds. reply status. clear-to-send high. cmd status 0x14 ? 0x84 get_int_status reply status. clear-to-send high. rdsint = 1 cmd arg1 arg2 arg3 arg4 arg5 arg6 arg7 status resp1 resp2 resp3 resp4 resp5 0x35 0x01 0x00 0x00 0x00 0x00 0x00 0x00 ? 0x80 ? 0x00 ? 0x5e ? 0x1e ? 0x03 ? 0x00 tx_rds_buff (si4711/13/21 only) clear rdsint reply status. clear-to-send high. no fifo overflow. circular buffer available = 94 circular buffer used = 30 fifo available = 0 fifo used = 3 cmd status 0x11 ? 0x80 power_down reply status. clear-to-send high. table 51. programming example for the fm/rds transmitter (continued) action data description
an332 rev. 1.0 253 12.2. programming exampl e for the fm/rds receiver the following is a flowchart showing the overvi ew of how to program the fm/rds receiver. reset chip state: power down chip state: power up power up with patch? check chip library id power_up with func=15 (command 0x01) power up with gpo2oen bit enabled (command 0x01) library id compatible w/ patch? power_up with patch and gpo2oen bits enabled (command 0x01) send patch data (command 0x15, 0x16) yes no yes no check chip/fw/comp rev get_rev (command 0x10) chip/fw/comp rev are correct? contact silabs for verification no yes contact silabs for verification
an332 254 rev. 1.0 set fm tune frequency (command 0x20) chip state: receiving fm set rclk settings (property 0x0201, 0x0202) use interrupt? use all default settings? yes no no set int settings (property 0x0001) yes set gpo (command 0x80, 0x81) yes use gpo? no which pin is used for the antenna? (si4706 only) set fm_antenna_input (property 0x1107 = 1) set fm_antenna_input (property 0x1107 = 0) lpi pin for embedded (short) antenna fmi pin for headphone (long) antenna use get_int_status (command 0x14) or hardware interrupts until stc bit is set call fm_tune_status with intack bit set (command 0x22) digital output mode? (si4706/41/43/45 only) enable digital audio by setting dfs sample rate (property 0x0104) yes no clock must be available on dclk/dfs pin set audio format (property 0x0102)
an332 rev. 1.0 255 set deemphasis (property 0x1100) set m ono/stereo blend settings (property 0x1800 ? 0x180b) set m ax tune e rror (property 0x1108) s et s oft m ute s ettings (property 0x1301 ? 0x1303) set fm tune frequency (command 0x20) chip state: receiving fm query fm_tune_status (command 0x22) set volume (property 0x4000) s et m ute/u nm ute (property 0x4001) not applicable to si4749 use get_int_status (comm and 0x14) or hardw are interrupts until stc bit is set call fm_tune_status w ith in t a c k bit set (command 0x22)
an332 256 rev. 1.0 receive rds? (si4706/41/43/45/49 only) set fm_rds_int_source (property 0x1500) set fm_rds_int_fifo_count (property 0x1501) set fm_rds_config & enable rds (property 0x1502) yes read rds data with fm_rds_status (command 0x24) received rds interrupt or poll rdsint from get_int_status loop until rds fifo is empty process rds data on the host disable rds in fm_rds_config (property 0x1502) no
an332 rev. 1.0 257 monitor received signal quality (rsq)? set r sq settings (property 0x1200 - 0x1207) query fm_rsq_status (command 0x23) o ptional: d o som ething based on fm_rsq_status scan fm band for valid channels? store valid channels in the h ost chip state: receiving fm yes no yes no set seek settings (property 0x1400-1404) seek next valid channel? set se ek settings (property 0x1400-1404) send fm_seek_start (command 0x21) yes chip state: r ec eivin g fm no loop until reaches end of fm band or back to the original channel send fm_seek_start (command 0x21) use get_int_status (command 0x14) or hardware interrupts until stc bit is set call fm_tune_status w ith in tac k bit set (command 0x22)
an332 258 rev. 1.0 change chip function to am/sw/lw/wb receive (si4740/41/42/ 43/44/45) ? send power_down (command 0x11) yes chip state: power down send power_up for fm transmit or am/sw/ lw receive or wb receive (command 0x01) chip state: power up (fm transmit or am/sw/lw receive or wb receive) look at fm transmit or am/sw/lw receive or wb receive flowchart no receive fm done? yes send power_down (command 0x11) chip state: power down repeat any of the instructions above after power_up state to change settings no go back to the very first power down state to power up the chip in fm receive need to change dclk/dfs rate? (digital only) disable digital audio by setting dfs sample rate to 0 (property 0x0104) change dclk/dfs rate or disable dclk/dfs enable digital audio by setting dfs sample rate (property 0x0104) dclk/dfs has been changed or re-enabled yes no
an332 rev. 1.0 259 table 52 provides an example for the fm/rds receiver. the table is broken into three columns. the first column lists the action taking place: command (cmd), argume nt (arg), status (status) or response (resp). for set_property commands, the property (prop) and property data (propd) are indicated. the second column lists the data byte or bytes in hexadec imal that are being sent or received. an arrow preceding the data indicates data being sent from the device to the system controller. the third column describes the action. in some cases the default properties may be acceptable and no modification is necessary. refer to ?5. commands and properties? for a full description of each command and property. table 52. programming example for the fm/rds receiver action data description powerup in digital mode cmd arg1 arg2 status 0x01 0xc0 0xb0 0x80 power_up set to fm receive. enable interrupts. set to digital audio output reply status. clear-to-send high. action: ensure that dclk and dfs are already supplied cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x04 0xbb 0x80 0x80 set_property digital_output_sample_rate sample rate = 48000hz = 0xbb80 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x02 0x00 0x00 0x80 set_property digital_output_format mode: i2s, stereo, 16bit, sample on rising edge of dclk. reply status. clear-to-send high. action: go to configuration (bypass ?powerup in analog mode? section). the rest of the programming is the same as analog. powerup in analog mode cmd arg1 arg2 status 0x01 0xc0 0x05 0x80 power_up set to fm receive. enable interrupts. set to analog audio output reply status. clear-to-send high. configuration cmd status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 0x10 ? 0x80 ? 0x1f ? 0x32 ? 0x30 ? 0x85 ? 0xc5 ? 0x32 ? 0x30 ? 0x42 get_rev reply status. clear-to-send high. part number, hex (0x1f = 31 dec. = si4731) firmware major rev, ascii (0x32 = 2) firmware minor rev, ascii (0x30 = 0) patch id msb, example only patch id lsb, example only component firmware major rev, ascii (0x32 = 2) component firmware minor rev, ascii (0x30 = 0) chip rev, ascii (0x42 = revb)
an332 260 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x00 0x01 0x00 0xc9 ? 0x80 set_property gpo_ien set stcien, errien, ctsien, rsqien reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x02 0x01 0x7e 0xf4 ? 0x80 set_property refclk_freq refclk = 32500 hz reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x02 0x02 0x01 0x90 ? 0x80 set_property refclk_prescale divide by 400 (example rclk = 13 mhz, refclk = 32500 hz) reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x40 0x00 0x00 0x3f ? 0x80 set_property rx_volume output volume = 63 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x11 0x00 0x00 0x01 ? 0x80 set_property fm_deemphasis 50 s reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x40 0x01 0x00 0x00 ? 0x80 set_property rx_hard_mute enable l and r audio outputs reply status. clear-to-send high. table 52. programming example for the fm/rds receiver (continued) action data description
an332 rev. 1.0 261 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x18 0x00 0x00 0x31 ? 0x80 set_property fm_blend_rssi_stereo_threshold threshold = 49dbv = 0x0031 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x18 0x01 0x00 0x1e ? 0x80 set_property fm_blend_rssi_mono_threshold threshold = 30 dbv = 0x001e reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x11 0x08 0x00 0x28 ? 0x80 set_property fm_max_tune_error threshold = 40 khz = 0x0028 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x12 0x00 0x00 0x8f ? 0x80 set_property fm_rsq_int_source enable blend, snr high, snr low, rssi high and rssi low interrupts. reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x12 0x01 0x00 0x1e ? 0x80 set_property fm_rsq_snr_hi_threshold threshold = 30 db = 0x001e reply status. clear-to-send high.clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x12 0x02 0x00 0x06 ? 0x80 set_property fm_rsq_snr_lo_threshold threshold = 6 db = 0x0006 reply status. clear-to-send high. table 52. programming example for the fm/rds receiver (continued) action data description
an332 262 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x12 0x03 0x00 0x32 ? 0x80 set_property fm_rsq_rssi_hi_threshold threshold = 50 dbv = 0x0032 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x12 0x04 0x00 0x18 ? 0x80 set_property fm_rsq_rssi_lo_threshold threshold = 24 dbv = 0x0018 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x12 0x07 0x00 0xb2 ? 0x80 set_property fm_rsq_blend_threshold pilot = 1, threshold = 50% = 0x0032 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x13 0x02 0x00 0x0a ? 0x80 set_property fm_soft_mute_max_attenuation attenuation = 10 db = 0x000a reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x13 0x03 0x00 0x06 ? 0x80 set_property fm_soft_mute_snr_threshold threshold = 6 db = 0x0006 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x14 0x00 0x22 0x6a ? 0x80 set_property fm_seek_band_bottom bottom freq = 88.1 mhz = 0x226a reply status. clear-to-send high. table 52. programming example for the fm/rds receiver (continued) action data description
an332 rev. 1.0 263 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x14 0x01 0x2a 0x26 ? 0x80 set_property fm_seek_band_top top freq = 107.9 mhz = 0x2a26 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x14 0x02 0x00 0x14 ? 0x80 set_property fm_seek_freq_spacing freq spacing = 200 khz = 0x0014 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x14 0x03 0x00 0x06 ? 0x80 set_property fm_seek_tune_sn r_threshold threshold = 6 db = 0x0006 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x14 0x04 0x00 0x14 ? 0x80 set_property fm_seek_tune_rssi_threshold threshold = 20 dbv = 0x0014 reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 status 0x20 0x00 0x27 0xf6 0x00 ? 0x80 fm_tune_freq set frequency to 102.3 mhz = 0x27f6 set antenna tuning capacitor to auto. reply status. clear-to-send high. cmd status 0x14 ? 0x81 get_int_status reply status. clear-to-send high. stcint = 1. cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 0x22 0x01 ? 0x80 ? 0x01 ? 0x27 ? 0xf6 ? 0x2d ? 0x33 ? 0x00 ? 0x00 fm_tune_status clear stc interrupt. reply status. clear-to-send high. valid frequency. frequency = 0x27f6 = 102.3 mhz rssi = 45 dbv snr = 51 db antenna tuning capacitor = 0 (range = 0?191) table 52. programming example for the fm/rds receiver (continued) action data description
an332 264 rev. 1.0 cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 0x23 0x01 ? 0x80 ? 0x00 ? 0x01 ? 0xd9 ? 0x2d ? 0x33 ? 0x00 ? 0x00 fm_rsq_status clear rsqint reply status. clear-to-send high. no blend, snr high, low, rssi high or low interrupts. soft mute is not engaged, no afc rail, valid frequency. pilot presence, 89% blend rssi = 45 dbv snr = 51 db freq offset = 0 khz cmd arg1 status 0x21 0x0c ? 0x80 fm_seek_start seek up and wrap. reply status. clear-to-send high. cmd status 0x14 ? 0x81 get_int_status reply status. clear-to-send high. stcint = 1. cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 0x22 0x01 ? 0x80 ? 0x01 ? 0x28 ? 0x6e ? 0x22 ? 0x2c ? 0x00 ? 0x00 fm_tune_status clear stc interrupt. reply status. clear-to-send high. valid frequency. frequency = 0x286e = 103.5 mhz rssi = 34 dbv snr = 44 db antenna tuning capacitor = 0 (range = 0?191) rds (si4706/41/43/45/49 only) cmd arg1 arg2(prop) arg3(prop) arg4(propd) arg5(propd) status 0x12 0x00 0x15 0x00 0x00 0x01 0x80 set_property fm_rds_int_source enable rdsrecv interrupt (set rdsint bit when rds has filled the fifo by the amount set on fm_rds_interrupt_fifo_count reply status. clear-to-send high cmd arg1 arg2(prop) arg3(prop) arg4(propd) arg5(propd) status 0x12 0x00 0x15 0x01 0x00 0x04 0x80 set_property fm_rds_int_fifo_count set the minimum number of rds group s stored in the rds fifo before rdsrecv is set reply status. clear-to-send high table 52. programming example for the fm/rds receiver (continued) action data description
an332 rev. 1.0 265 cmd arg1 arg2(prop) arg3(prop) arg4(propd) arg5(propd) status 0x12 0x00 0x15 0x02 0xef 0x01 0x80 set_property fm_rds_config set block error a,b,c,d to 3,2,3,3 enable rds reply status. clear-to-send high cmd status 0x14 0x84 get_int_status reply status. clear-to-send high. rdsint = 1 cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x84 0x01 0x01 0x17 0x40 0xa7 0x20 0x00 0x53 0x49 0x4c 0x49 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. rds interrupt (rdsint) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x17 = 23. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2000 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0000b = 0 (char 1,2,3,4) block c: 0x5349 si block d: 0x4c49 li ble: 0 (no error) current rt: ?sili? cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x16 0x40 0xa7 0x00 0x0c 0xe1 0x02 0x53 0x49 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x16 = 22. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x000c group type: 0a (program service ps) pty: 00000b (undefined) address code: 00b = 0 (char 1,2) block c (ignored) block d: 0x5349 si ble: 0 (no error) current ps: ?si? complete scrolling ps: ?silabs rds demo? table 52. programming example for the fm/rds receiver (continued) action data description
an332 266 rev. 1.0 cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x15 0x40 0xa7 0x20 0x01 0x43 0x4f 0x4e 0x20 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x15 = 21. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2001 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0001b = 1 (char 5,6,7,8) block c: 0x434f co block d: 0x4e20 n ble: 0 (no error) current rt: ?silicon? cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x15 0x40 0xa7 0x00 0x09 0xe1 0x02 0x4c 0x41 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x15 = 21 (fifo receives another group while querying) block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x000c group type: 0a (program service ps) pty: 00000b (undefined) address code: 01b = 1 (char 3,4) block c (ignored) block d: 0x4c41 la ble: 0 (no error) current ps: ?sila? complete scrolling ps: ?silabs rds demo? table 52. programming example for the fm/rds receiver (continued) action data description
an332 rev. 1.0 267 cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x14 0x40 0xa7 0x20 0x02 0x4c 0x41 0x42 0x4f 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x14 = 20. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2002 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0002b = 2 (char 9,10,11,12) block c: 0x4c41 la block d: 0x424f bo ble: 0 (no error) current rt: ?silicon labo? cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x14 0x40 0xa7 0x00 0x0a 0xe1 0x02 0x42 0x53 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x14 = 20. (fifo receives another group while querying) block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x000c group type: 0a (program service ps) pty: 00000b (undefined) address code: 10b = 2 (char 5,6) block c (ignored) block d: 0x4253 bs ble: 0 (no error) current ps: ?silabs? complete scrolling ps: ?silabs rds demo? table 52. programming example for the fm/rds receiver (continued) action data description
an332 268 rev. 1.0 cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x13 0x40 0xa7 0x20 0x03 0x52 0x41 0x54 0x4f 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x13 = 19. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2003 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0003b = 3 (char 13,14,15,16) block c: 0x5241 ra block d: 0x544f to ble: 0 (no error) current rt: ?silicon laborato? cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x13 0x40 0xa7 0x00 0x0b 0xe1 0x02 0x20 0x20 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x13 = 19. (fifo receives another group while querying) block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x000c group type: 0a (program service ps) pty: 00000b (undefined) address code: 11b = 3 (char 7,8) block c (ignored) block d: 0x2020 ? ? ble: 0 (no error) current ps: ?silabs? complete scrolling ps: ?silabs rds demo? table 52. programming example for the fm/rds receiver (continued) action data description
an332 rev. 1.0 269 cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x12 0x40 0xa7 0x20 0x04 0x52 0x49 0x45 0x53 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x12 = 18. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2004 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0004b = 4 (char 17,18,19,20) block c: 0x5249 ri block d: 0x4553 es ble: 0 (no error) current rt: ?silicon laboratories? cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x12 0x40 0xa7 0x00 0x0c 0xe1 0x02 0x52 0x44 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x12 = 18. (fifo receives another group while querying) block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x000c group type: 0a (program service ps) pty: 00000b (undefined) address code: 00b = 0 (char 1,2) block c (ignored) block d: 0x5244 rd ble: 0 (no error) current ps: ?rdlabs scrolling ps: ?silabs rds demo? table 52. programming example for the fm/rds receiver (continued) action data description
an332 270 rev. 1.0 cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x11 0x40 0xa7 0x20 0x05 0x20 0x53 0x49 0x34 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x11 = 17. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2005 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0005b = 5 (char 21,22,23,24) block c: 0x2053 s block d: 0x4934 i4 ble: 0 (no error) current rt: ?silicon laboratories si4? cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x10 0x40 0xa7 0x00 0x09 0xe1 0x02 0x53 0x20 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x10 = 16. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x000c group type: 0a (program service ps) pty: 00000b (undefined) address code: 01b = 1 (char 3,4) block c (ignored) block d: 0x5320 s ble: 0 (no error) current ps: ?rds bs? complete scrolling ps: ?silabs rds demo? table 52. programming example for the fm/rds receiver (continued) action data description
an332 rev. 1.0 271 cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x0f 0x40 0xa7 0x20 0x06 0x37 0x31 0x58 0x20 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x0f = 15. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2006 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0006b = 6 (char 25, 26, 27, 28) block c: 0x3731 71 block d: 0x5820 x ble: 0 (no error) current rt: ?silicon laboratories si471x ? cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x0e 0x40 0xa7 0x00 0x0a 0xe1 0x02 0x44 0x45 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x0e = 14. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x000a group type: 0a (program service ps) pty: 00000b (undefined) address code: 10b = 2 (char 5, 6) block c (ignored) block d: 0x4445 de ble: 0 (no error) current ps: ?rds de? complete scrolling ps: ?silabs rds demo? table 52. programming example for the fm/rds receiver (continued) action data description
an332 272 rev. 1.0 cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x0e 0x40 0xa7 0x20 0x07 0x52 0x44 0x53 0x20 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x0e = 14. (fifo receives another group while querying) block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2007 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0007b = 7 (char 29,30,31,32) block c: 0x5244 rd block d: 0x5320 s ble: 0 (no error) current rt: ?silicon l aboratories si471x rds? cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x0d 0x40 0xa7 0x00 0x0b 0xe1 0x02 0x4d 0x4f 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x0d = 13. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x000c group type: 0a (program service ps) pty: 00000b (undefined) address code: 11b = 3 (char 7,8) block c (ignored) block d: 0x4d4f mo ble: 0 (no error) current ps: ?rds demo? complete scrolling ps: ?silabs rds demo? table 52. programming example for the fm/rds receiver (continued) action data description
an332 rev. 1.0 273 cmd arg1 +status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x0d 0x40 0xa7 0x20 0x08 0x44 0x45 0x4d 0x4f 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x0d = 13. (fifo receives another group while querying) block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2008 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0008b = 8 (char 33,34,35,36) block c: 0x4445 de block d: 0x4d4f mo ble: 0 (no error) current rt: ?silicon labo ratories si471x rds demo? cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x0c 0x40 0xa7 0x00 0x0c 0xe1 0x02 0x53 0x49 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x0c = 12. block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x000c group type: 0a (program service ps) pty: 00000b (undefined) address code: 00b = 0 (char 1,2) block c (ignored) block d: 0x5349 si ble: 0 (no error) current ps: ?sis_demo? complete scrolling ps: ?silabs rds demo? table 52. programming example for the fm/rds receiver (continued) action data description
an332 274 rev. 1.0 the device sets the cts bit (and optional interrupt) to in dicate that it is ready to accept the next command. the cts bit also indicates that the power_up, get_ rev, power_down, get_property, get_int_status, fm_tune_status, and fm_rsq_status co mmands have completed execution. when performing a fm_tune_freq or fm_seek_start cts will indicate that the device is ready to accept the next command even though the operation is not comple te. get_int_status or hardware interrupts should be used to query for the stc bit to be set prior to performing other commands. use fm_tune_status to clear the stc bit after it has been set. cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x24 0x01 0x80 0x01 0x01 0x0d 0x40 0xa7 0x20 0x09 0x0d 0x00 0x00 0x00 0x00 fm_rds_status clear rds interrupt. reply status. clear-to-send (cts) high. seek/tune complete (stcint) high. interrupt source: rds received. rds synchronized. no lost data. rds fifo used: 0x0c = 12. (fifo receives another group while querying) block a: 0x40a7 pi code: 0x40a7 (kslb). block b: 0x2009 group type: 2a (radio text rt) pty: 00000b (undefined) address code: 0009b = 9 (char 37,38,39,40) block c: 0x0d00 ?ret? ?nul? (end of rt) block d: 0x0000 ?nul? ?nul? ble: 0 (no error) current rt: ?silicon labo ratories si471x rds demo? - continue sending fm_rds_status until fifo empty - cmd status 0x11 ? 0x80 power_down reply status. clear-to-send high. table 52. programming example for the fm/rds receiver (continued) action data description
an332 rev. 1.0 275 12.3. programming example for the am/lw/sw receiver the following flowchart shows an overview of how to program the am/lw/sw receiver. reset chip state: power down chip state: power up power up with patch? check chip library id power_up with func=15 (command 0x01) power up with gpo2oen bit enabled (command 0x01) library id compatible w/ patch? power_up with patch and gpo2oen bits enabled (command 0x01) send patch data (command 0x15, 0x16) yes no yes no check chip/fw/comp rev get_rev (command 0x10) chip/fw/comp rev are correct? contact silabs for verification no yes contact silabs for verification
an332 276 rev. 1.0 set am tune frequency (command 0x40) chip state: receiving am / sw / lw digital output mode? (si4741/43/45 only) set rclk settings (property 0x0201, 0x0202) set digital output settings (property 0x0102, 0x0104) use interrupt? use all default settings? yes no no set int settings (property 0x0001) yes set gpo (command 0x80, 0x81) yes use gpo? no yes no use get_int_status (command 0x14) or hardware interrupts until stc bit is set call am_tune_status with intack bit set (command 0x42)
an332 rev. 1.0 277 set am_deemphasis (property 0x3100) set am_channel_filter (property 0x3102) s et s oft m ute s ettings (property 0x3301- 3303) chip state: r e c e iv in g a m / s w / l w query am_tune_status (com mand 0x42) set volume (property 0x4000) s et m ute/u nm ute (property 0x4001) set am tune frequency (com mand 0x40) use get_int_status (com m and 0x14) or hardware interrupts u ntil s t c bit is set call am_tune_status w ith in t a c k bit set (com mand 0x42)
an332 278 rev. 1.0 monitor received signal quality (rsq)? set rsq settings (property 0x3200 - 0x3204) query am_rsq_status (command 0x43) optional: do something based on am_rsq_status scan am/sw/lw band for valid channels? store valid channels in the host yes no yes no loop until reaches end of am band or back to the original channel seek next valid channel? set seek settings (property 0x3400-3404) send am_seek_start (command 0x41) yes no set seek settings (property 0x3400-3404) send am_seek_start (command 0x41) chip state: receiving am / sw / lw chip state: receiving am / sw / lw use get_int_status (command 0x14) or hardware interrupts until stc bit is set call am_tune_status with intack bit set (command 0x42)
an332 rev. 1.0 279 change chip function to fm receive or weather band? send power_down (command 0x11) yes chip state: power down send power_up for fm receive or weather band (command 0x01) chip state: power up (fm receive or weather band) look at fm receive or weather band flowchart no receive am / sw / lw done? yes send power_down (command 0x11) chip state: power down repeat any of the instructions above after power_up state to change settings no go back to the very first power down state to power up the chip in am / sw / lw receive
an332 280 rev. 1.0 table 53 provides an example of programming the am/lw/sw receiver. the table is broken into three columns. the first column lists the action taking place: command (cmd), argument (arg), status (status) or response (resp). for set_property commands, th e property (prop) and property data (propd ) are indicated. the second column lists the data byte or bytes in hexadecimal that are being sent or received. an arrow preceding the data indicates data being sent from the device to the system controller. the third column describes the action. note that in some cases the default properties may be acceptable and no modification is necessary. refer to section ?5. commands and properties? for a fu ll description of each command and property. table 53. programming example for the am/lw/sw receiver action data description powerup in digital mode cmd arg1 arg2 status 0x01 0xc1 0xb0 0x80 power_up set to am/lw/sw receiv e. enable interrupts. set to digital audio output reply status. clear-to-send high. action: ensure that dclk and dfs are already supplied cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x04 0xbb 0x80 0x80 set_property digital_output_sample_rate sample rate=48000hz=0xbb80 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x01 0x02 0x00 0x00 0x80 set_property digital_output_format mode: i 2 s, stereo, 16bit, sample on rising edge of dclk. reply status. clear-to-send high. action: go to configuration (bypass ?powerup in analog mode? section). the rest of the programming is the same as analog. powerup in analog mode cmd arg1 arg2 status 0x01 0xc1 0x05 0x80 power_up set to am/lw/sw receiv e. enable interrupts. set to analog audio output reply status. clear-to-send high. configuration
an332 rev. 1.0 281 cmd status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 0x10 ? 0x80 ? 0x1f ? 0x32 ? 0x30 ? 0x85 ? 0xc5 ? 0x32 ? 0x30 ? 0x42 get_rev reply status. clear-to-send high. part number, hex (0x1f = 31 dec. = si4731) firmware major rev, ascii (0x32 = 2) firmware minor rev, ascii (0x30 = 0) patch id msb, example only patch id lsb, example only component firmware major rev, ascii (0x32 = 2) component firmware minor rev, ascii (0x30 = 0) chip rev, ascii (0x42 = revb) cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x00 0x01 0x00 0xc1 ? 0x80 set_property gpo_ien set stcien, errien, ctsien reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x02 0x01 0x7e 0xf4 ? 0x80 set_property refclk_freq refclk = 32500 hz reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x02 0x02 0x01 0x90 ? 0x80 set_property refclk_prescale divide by 400 (example rclk = 13 mhz, refclk = 32500 hz) reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x40 0x00 0x00 0x3f ? 0x80 set_property rx_volume output volume = 63 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x31 0x02 0x00 0x01 ? 0x80 set_property am_channel_filter 4 khz bandwidth = 0x01 reply status. clear-to-send high. table 53. programming example for the am/lw/sw receiver (continued) action data description
an332 282 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x31 0x00 0x00 0x01 ? 0x80 set_property am_deemphasis 50 s reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x32 0x00 0x00 0x08 ? 0x80 set_property am_rsq_interrupts interrupt when snr higher than rsq snr threshold reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x32 0x01 0x00 0x0a ? 0x80 set_property am_rsq_snr_high_threshold 10 db = 0x0a reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x32 0x02 0x00 0x0a ? 0x80 set_property am_rsq_snr_l ow_threshold 10 db = 0x0a reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x32 0x03 0x00 0x1e ? 0x80 set_property am_rsq_rssi_high_threshold 30 dbv = 0x1e reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x32 0x04 0x00 0x0a ? 0x80 set_property am_rsq_rssi_low_threshold 10 dbv = 0x0a reply status. clear-to-send high. table 53. programming example for the am/lw/sw receiver (continued) action data description
an332 rev. 1.0 283 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x33 0x02 0x00 0x0a ? 0x80 set_property am_soft_mute_max_attenuation 10 db attenuation = 0x0a reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x33 0x03 0x00 0x09 ? 0x80 set_property am_soft_mute_snr_threshold 9 db = 0x09 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x34 0x00 0x02 0x08 ? 0x80 set_property am_seek_band_bottom 520 khz = 0x0208 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x34 0x01 0x06 0xae ? 0x80 set_property am_seek_band_top 1710 khz = 0x06ae reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x34 0x02 0x00 0x0a ? 0x80 set_property am_seek_freq_spacing 10 khz = 0x000a reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x34 0x03 0x00 0x0b ? 0x80 set_property am_seek_snr_threshold 0x000b = 11 db reply status. clear-to-send high. table 53. programming example for the am/lw/sw receiver (continued) action data description
an332 284 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x34 0x04 0x00 0x2a ? 0x80 set_property am_seek_rssi_threshold 0x002a = 42 dbv reply status. clear-to-send high. cmd arg1 arg2 arg3 arg4 arg5 status 0x40 0x00 0x03 0xe8 0x00 0x00 ? 0x80 am_tune_freq set frequency to 1000 khz = 0x03e8 automatically select tuning capacitor reply status. clear-to-send high. cmd status 0x14 ? 0x81 get_int_status reply status. clear-to-send high. stcint = 1. cmd arg1 status 0x41 0x0c ? 0x80 am_seek_start seek up and wrap at band boundary reply status. clear-to-send high. cmd status 0x14 ? 0x81 get_int_status reply status. clear-to-send high. stcint = 1. cmd arg1 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 0x42 0x01 ? 0x80 ? 0x01 ? 0x03 ? 0xe8 ? 0x2a ? 0x1a ? 0x0d ? 0x95 am_tune_status clear stc interrupt. reply status. clear-to-send high. channel is valid, afc is not railed, and seek did not wrap at am band boundary frequency = 0x03e8 = 1000 khz rssi = 0x2a = 42d = 42 dbv snr = 0x1a = 26d = 26 db value the antenna tuning capacitor is set to. 0x0d95 = 3477 dec. cmd arg1 status resp1 resp2 resp3 resp4 resp5 0x43 0x01 ? 0x80 ? 0x00 ? 0x01 ? 0x00 ? 0x2a ? 0x1a am_rsq_status clear stc interrupt. reply status. clear-to-send high. no snr high, low, rssi high, or low interrupts. channel is valid, soft mute is no t activated, and afc is not railed rssi = 0x2a = 42d = 42 dbv snr = 0x1a = 26d = 26 db cmd status 0x11 ? 0x80 power_down reply status. clear-to-send high. table 53. programming example for the am/lw/sw receiver (continued) action data description
an332 rev. 1.0 285 the device sets the cts bit (and optional interrupt) to in dicate that it is ready to accept the next command. the cts bit also indicates that the power_up, get_ rev, power_down, get_property, get_int_status, am_tune_status, and am_rsq_status commands have completed execution. when performing a am_tune_freq or am_seek_start cts will indicate that the device is ready to accept the next command even though the operation is not comple te. get_int_status or hardware interrupts should be used to query for the stc bit to be set prior to performing other commands. use am_tune_status to clear the stc bit after it has been set. 12.4. programming exampl e for the wb/same receiver the following flowchart is an overview of ho w to program the wb (weather band) receiver. reset chip state: power down chip state: power up power up with patch? check chip library id power_up with func=15 (command 0x01) power up with gpo2oen bit enabled (command 0x01) library id compatible w/ patch? power_up with patch and gpo2oen bits enabled (command 0x01) send patch data (command 0x15, 0x16) yes no yes no check chip/fw/comp rev get_rev (command 0x10) chip/fw/comp rev are correct? contact silabs for verification no yes contact silabs for verification
an332 286 rev. 1.0 set wb tune frequency (command 0x50) chip state: receiving wb set rclk settings (property 0x0201, 0x0202) use interrupt? use all default settings? yes no no set int settings (property 0x0001) yes set gpo (command 0x80, 0x81) yes use gpo? no use get_int_status (command 0x14) or hardware interrupts until stc bit is set call wb_tune_status with intack bit set (command 0x52)
an332 rev. 1.0 287 set w b max tune error (property 0x5108) set w b tune frequency (com m and 0x50) chip state: receiving wb query w b_tune_status (com m and 0x52) set volume (property 0x4000) s et m ute/u nm ute (property 0x4001) set w b valid snr threshold (property 0x5403) s e t w b v a lid r s s i threshold (property 0x5404) use get_int_status (com m and 0x14) or hardw are interrupts until stc bit is set call wb_tune_status w ith in t a c k bit set (com m and 0x52)
an332 288 rev. 1.0 monitor received signal quality (rsq)? set rsq settings (property 0x5200 - 0x5204) query wb_rsq_status (command 0x53) optional: do something based on wb_rsq_status yes no monitor alert tone (asq)? set asq int source (property 0x5600) query wb_asq_status (command 0x55) optional: do something based on wb_asq_status yes no monitor same? set same int source (property 0x5500) query wb_same_status (command 0x54) optional: do something based on wb_same_status yes no comlete message received? no yes
an332 rev. 1.0 289 change chip function to am or fm? send power_down (command 0x11) yes chip state: power down send power_up for am or fm receive (command 0x01) chip state: power up (am or fm receive) look at am or fm receive flowchart no receive wb done? yes send power_down (command 0x11) chip state: power down repeat any of the instructions above after power_up state to change settings no go back to the very first power down state to power up the chip in wb receive
an332 290 rev. 1.0 for detailed information on same processing, please refer to the following flow chart: set gpo_ien for same and alert tone interrupts = 0x06 start configure same interrupts for hdr_rdy, eom_det, and pre_det wb_same_interrupt source = 0x0b tune to wb channel wb_tune_freq disable timer set hdr_count = 0 check interrupt status get_int_status same_int or asq_int = 1? timer > 6 sec? clear same buffer, disable timer, and set_hdr.count = 0 int type? call wb_same_status int_ack = 1 eom_det = 1? pre_det = 1? hdr_rdy = 1 at this point increment hdr_count get message and process wb_same_status hdr_count = 3? reset timer yes no yes yes yes no yes no no no message length /8 same_int asq_int
an332 rev. 1.0 291 table 54 provides an example for the wb receiver. the tabl e is broken into three colu mns. the first column lists the action taking place: command (cmd), argument (arg), status (status) or response (resp). for set_property commands, the property (prop) and property data (propd) are indicated. the second column lists the data byte or bytes in hexadec imal that are being sent or received. an arrow preceding the data indicates data being sent from the device to the system controller. the third column describes the action. note that in some cases the default properties may be acceptable and no modification is necessary. refer to section ?5. commands and properties? for a fu ll description of each command and property. table 54. programming example for the wb/same receiver action data description cmd arg1 arg2 status 0x01 0xc3 0x05 0x80 power_up set to weatherband receive. enable interrupts. set to analog out. reply status. clear-to-send high. cmd status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 0x10 0x80 0x25 0x30 0x41 0x13 0x36 0x30 0x41 0x42 get_rev reply status. clear-to-send high. part number, hex (0x25 = 37 dec. = si4737) firmware major rev, ascii (0x30 = 0) firmware minor rev, ascii (0x41 = a) patch id msb, example only patch id lsb, example only component firmware major rev, ascii (0x30 = 0) component firmware minor rev, ascii (0x41 = a) chip rev, ascii (0x42 = revb) cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x00 0x01 0x00 0xc7 0x80 set_property gpo_ien set stcien, errien, ctsien, asqien, sameien reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x02 0x01 0x80 0x00 0x80 set_property refclk_freq refclk = 32768 hz reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x02 0x02 0x00 0x01 0x80 set_property refclk_prescale divide by 1 reply status. clear-to-send high.
an332 292 rev. 1.0 cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x40 0x00 0x00 0x3f 0x80 set_property rx_volume output volume = 63 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x40 0x01 0x00 0x00 0x80 set_property rx_hard_mute enable l and r audio outputs reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x54 0x03 0x00 0x06 0x80 set_property wb_valid_snr_threshold threshold = 06 db = 0x0006 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x54 0x04 0x00 0x14 0x80 set_property wb_valid_rssi_threshold threshold = 20 dbv = 0x0014 reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x56 0x00 0x00 0x01 0x80 set_property wb_asq_interrupt_source interrupt when aler t tone is present. reply status. clear-to-send high. cmd arg1 arg2 (prop) arg3 (prop) arg4 (propd) arg5 (propd) status 0x12 0x00 0x55 0x00 0x00 0x01 0x80 set property wb_same_interrupt_source (si4707 only) interrupt when header is ready. reply status. clear-to-send high. cmd arg1 arg2 arg3 status 0x50 0x00 0xfd 0xc0 0x80 wb_tune_freq set frequency to 162.4 mhz = 0xfdc0 frequency is set in units of 2500 hz. reply status. clear-to-send high. table 54. programming example for the wb/same receiver (continued)
an332 rev. 1.0 293 the device sets the cts bit (and optional interrupt) to in dicate that it is ready to accept the next command. the cts bit also indicates that the power_up, get_ rev, power_down, get_property, get_int_status, wb_tune_status, wb_asq_status, and wb_rsq _status commands have completed execution. when performing a wb_tune_freq cts w ill indicate that the de vice is ready to acce pt the next command even though the operation is not complete. get_int_status or hardware interrupts should be used to query for the stc bit to be set prior to performing other commands. use wb_tune_status to clear the stc bit after it has been set. cmd status 0x14 0x81 get_int_status reply status. clear-to-send high. stcint = 1. cmd arg1 status resp1 resp2 resp3 resp4 resp5 0x52 0x01 0x80 0x01 0xfd 0xc0 0x22 0x17 wb_tune_status clear stc interrupt. reply status. clear-to-send high. valid frequency. frequency = 0xfdc0 = 162.4 mhz rssi = 34 dbv snr = 23 db cmd arg1 status resp1 0x55 0x01 0x80 0x02 wb_asq_status reply status. clear-to-send high. alert tone is not present. same (si4707 only) cmd status 0x14 0x84 get_int_status reply status. clear-to-send high. sameint = 1. cmd arg1 arg2 status resp1 resp2 resp3 resp4 resp5 resp6 resp7 resp8 resp9 resp10 resp11 resp12 0x54 0x01 0x00 0x80 0x0f 0x00 0xfe 0xff 0x2d 0x57 0x58 0x52 0x2d 0x56 0x4f 0x57 wb_same_status clear same interrupt. begin reading message from byte 0. reply status. clear-to-send high. message flags set. state = end of message. message length 254 bytes. data confidence level = high. data0 data1 data2 data3 data4 data5 data6 data7 note: this command should be called repeatedly with the readaddr[7:0] incremented by 8 each time until a ll 254 bytes (in this example) are returned. the buffer should then be cleared as described in the wb_same_status:clrbuf bit description. cmd status 0x11 0x80 power_down reply status. clear-to-send high. table 54. programming example for the wb/same receiver (continued)
an332 294 rev. 1.0 a ppendix a?c omparison of the si4704/05/3 x -b20, si4704/05/3 x -c40, and si4704/05/3 x -d60 this appendix describes th e configuration, command, and property differences between silicon and firmware revisions of the si4704/05/3x-b20, si 4704/05-3x-c40, and si4704/ 05/3x-d60 devices. each revision is referred to by its die revision and firmware revision suffix accordi ng to table 1. for a more detailed configuration reference, consult ?an332: si47xx programming guide?. table 55. die revision and firmware revision table part number function die revision firmware revision die revision + firmware revision suffix si4704-b20-gm/gu fm receiver b 20 -b20 si4705-b20-gm/gu fm rds receiver b 20 -b20 si4730-b20-gm/gu am/fm receiver b 20 -b20 si4731-b20-gm/gu am/fm rds receiver b 20 -b20 si4734-b20-gm/gu am/sw/fm receiver b 20 -b20 si4735-b20-gm/gu am/sw/fm rds receiver b 20 -b20 si4704-c40-gm/gu fm receiver c 40 -c40 si4705-c40-gm/gu fm rds receiver c 40 -c40 si4730-c40-gm/gu am/fm receiver c 40 -c40 si4731-c40-gm/gu am/fm rds receiver c 40 -c40 si4734-c40-gm/gu am/sw/fm receiver c 40 -c40 si4735-c40-gm/gu am/sw/fm rds receiver c 40 -c40 si4704-d60-gm/gu fm receiver d 60 -d60 si4705-d60-gm/gu fm rds receiver d 60 -d60 si4730-d60-gm/gu am/fm receiver d 60 -d60 si4731-d60-gm/gu am/fm rds receiver d 60 -d60 si4734-d60-gm/gu am/sw/fm receiver d 60 -d60 si4735-d60-gm/gu am/sw/fm rds receiver d 60 -d60
an332 rev. 1.0 295 each of the following subsections de scribes the differences be tween revisions for groups of properties and/or commands. each property is listed as property _name (number) = default (supported revisions). hexadecimal values are immediately preceded by ?0x?; all other numeric values are decimal. am, fm, and wb errata on -b20 have been addressed in -c40 and/or -d60 devices. the -d60 is the most recent revision and offers advanced features not available in the -c40 and -b20 revisions. fm properties and commands the properties and commands in this section are related to fm mode. fm mode max tune error (0x110x properties) fm_mode_max_tune_error (0x1108) = 30 (-b20), 20 (-c40, -d60) maximum tune error in khz is stored in property 0x1108. it has a default se tting of 30 khz in -b20, and a default setting of 20 khz in -c40 and -d60. it should be noted t hat 20 khz has been recommended for best performance even on -b20 devices through an332. fm rsq interrupt confi guration (0x120x properties) fm_rsq_multipath_high_threshold (0x1205 ) = 127 (-d60) fm_rsq_multipath_low_thr eshold (0x1206 ) = 0 (-d60) properties 0x1205 and 0x1206 are only available on -d60 parts. fm soft mute configur ation (0x130x properties) fm_soft_mute_slope (0x1301) = 2 (-c40, -d60) the target soft mute target attenuation - up to a set ma ximum attenuation level - is calculated as the difference between the soft mute threshold and the received snr multiplied by a property value called the fm_soft_mute_slope. in -c40 and -d60, the default slope is 2 db/db. in in -b20, the slope is not configurable through a property, but is also 2 db/db. stereo blend thresholds (0x110x, 0x180x properties) fm_blend_stereo_threshold (0x1105) = 49 (-b20, -c40) fm_blend_mono_threshold (0x1106) = 30 (-b20, -c40) fm_blend_rssi_stereo_thresh old (0x1800) = 49 (-d60) fm_blend_rssi_mono_threshold (0x1801) = 30 (-d60) fm_blend_rssi_attack_rate (0x1802) = 4000 (-d60) fm_blend_rssi_release_rate (0x1803) = 400 (-d60) fm_blend_snr_stereo_threshold (0x1804) = 27 (-d60) fm_blend_snr_mono_threshold (0x1805) = 14 (-d60) fm_blend_snr_attack_rate (0x1806) = 4000 (-d60) fm_blend_snr_release_rate (0x1807) = 400 (-d60) fm_blend_multipath_stereo_t hreshold (0x1808) = 20 (-d60)
an332 296 rev. 1.0 fm_blend_multipath_mono_threshold (0x1809) = 60 (-d60) fm_blend_multipath_attack_rate (0x180a) = 4000 (-d60) fm_blend_multipath_release_rate (0x180b) = 40 (-d60) in -b20 and -c40, fm stereo blend is only determined by rssi based on blend thresholds set in 0x1105 and 0x1106. in -d60 devices, a series of advanced blend properties have been added to improve the user experience under dynamic signal conditions. to accommodate for this change, rssi based threshold properties were relocated respectively to properties 0x1800 and 0x1801. 0x1800 and 0x1801 have the same default values as 0x1105 and 0x1106. additional advanced blend features include stereo blendi ng based on snr and multipath thresholds. for each set of thresholds, separate blend attack (into mono) and releas e (into stereo) rates may be set. each of the factors is independently evaluated, and any may trigger a blend into mono at its given threshold and rate. to remove any of the advanced blend factors from consideration; set the corresponding blend thresholds to min value of 0 for snr based blend (0x1804/0x1805), and set th e corresponding blend thresholds to max value of 100 for multipath based blend (0x1808/0x1809). fm commands some parameters and returned values are only applicable to -d60 parts. these are: multipath indicator returned by the fm_tune_status command and the multip ath_detect_high and multipath_detect_low parameters of the fm_rsq_status command. in -c40 and -d60 devices, the rdssync bit of the response to an fm_rds_status command may be incorrectly set. a patch is av ailable only for -d60 devices.
an332 rev. 1.0 297 am properties the properties and commands in this section are related to am mode. am mode configurat ion (0x310x properties) am_mode_avc_max_gain (0x3103) = 0x1543 (-c40, -d60) am_mode_afc_sw_pull_in_range (0x3104) = 8695 (-c40, -d60) am_mode_afc_sw_lock_in_range (0x3105) = 11765 (-c40, -d60) am_mode_avc_max_gain is available in -c40 and -d60 devices wi th a default max gain of 16 db. in -b20, the avc gain is set at maximum and not available through a property. to make -c40 or -d60 behave as -b20, set am_mode_max_gain to 0x7800. am shortwave afc range properties are available in -c40 and -d60 devices (supp orted by si4734/35 devices only). the default values of these prope rties provide similar behavior to the behavior of -b20 devices. however, in -b20 devices, these proper ties are not available through the programming api. am soft mute configur ation (0x330x properties) am_soft_mute_slope (0x3301) = 2 (-b20), 1 (-c40, -d60) am_soft_mute_max_attenuation (0x3302) = 16 (-b20), 8 (-c40, -d60) am_soft_mute_snr_threshold (0x3303) = 10 (-b20), 8 (-c40, -d60) settings for audio soft mute soft mute is active when snr falls below the gi ven am_soft_mute_snr_threshold. when active, the output audio will be decreased at a set rate until the target soft mute attenuation is achi eved. in -b20 devices the threshold is 10 db, whereas in -c40 and -d60 devices it is 8 db. the target soft mute target attenuation - up to a set ma ximum attenuation level - is calculated as the difference between the soft mute threshold and the received snr multiplied by a scalar value called the soft mute slope. the default value of this property is 1 db/db in -c40 and -d60. in -b20, the value used is 2 db/db. the maximum soft mute attenuation level is 10 db in -b20. in -c40 and -d60 devices, the maximum level can be set by a property am_soft_mute_maximum_attenuation, which has a default value of 8 db. the soft mute default changes in -c40 and -d60 have been made to improve weak signal listening experience.
an332 298 rev. 1.0 a ppendix b?si4704/05/3 x -b20/-c40/-d60 c ompatibility c hecklist this appendix describes the configur ation differences between hardware re visions of si4704/05/3x devices. it describes how to achieve ba ckwards compatibility between systems designed for si47 04/05/3x-b20, -c40, and - d60 device hardware revisions. it is not intended as a comple te reference to si4704/05/3x configuration. for an in- depth configuration reference, consul t ?an332: si47xx programming guide?. in this appendix, each revision is referred to by its die revision and firmware revision suffix according to the following table. hexadecimal values are immediately preceded by ?0x?; all other numeric values are decimal. table 56. die revision and firmware revision table part number function die revision firmware revision die revision + firmware revision suffix si4704-b20-gm/gu fm receiver b 20 -b20 si4705-b20-gm/gu fm rds receiver b 20 -b20 si4730-b20-gm/gu am/fm receiver b 20 -b20 si4731-b20-gm/gu am/fm rds receiver b 20 -b20 si4734-b20-gm/gu am/sw/fm receiver b 20 -b20 si4735-b20-gm/gu am/sw/fm rds receiver b 20 -b20 si4704-c40-gm/gu fm receiver c 40 -c40 si4705-c40-gm/gu fm rds receiver c 40 -c40 si4730-c40-gm/gu am/fm receiver c 40 -c40 si4731-c40-gm/gu am/fm rds receiver c 40 -c40 si4734-c40-gm/gu am/sw/fm receiver c 40 -c40 si4735-c40-gm/gu am/sw/fm rds receiver c 40 -c40 si4704-d60-gm/gu fm receiver d 60 -d60 si4705-d60-gm/gu fm rds receiver d 60 -d60 si4730-d60-gm/gu am/fm receiver d 60 -d60 si4731-d60-gm/gu am/fm rds receiver d 60 -d60 si4734-d60-gm/gu am/sw/fm receiver d 60 -d60 si4735-d60-gm/gu am/sw/fm rds receiver d 60 -d60
an332 rev. 1.0 299 to achieve similar performance in si4704/05/3x-d60 to si4704/05/3x-c40 the -d60 devices have a more advanced feature set than -c40 devices. this sect ion describes a step-by-step procedure to achieve similar perform ance from -d60 devices to that of -c 40 devices by modifying or disabling some of the advanced features. fm receiver mode ? there is a debug feature that remains active in si4704/05/3x-d60 firm ware which can create periodic noise in audio. silicon labs recommends you disable this feature by sending the fo llowing bytes (shown here in hexadecimal form): 0x12 0x00 0xff 0x00 0x00 0x00 ? in si4704/05/3x-d60 devices, the fm_blend_rssi_stereo_threshold prop erty is no longer at address 0x1105. use address 0x1800 instead. ? in si4704/05/3x-d60 devices, the fm_blend_rssi_mon o_threshold property is no longer at address 0x1106. use address 0x1801 instead. ? to disable the snr-based stereo blend, set bo th the fm_blend_snr_stereo_threshold property (0x1804) and the fm_blend_snr_mono _threshold property (0x1805) to 0. ? to disable the multipath-based stereo blend, se t both the fm_blend_multipath_stereo_threshold property (0x1808) and the fm_blend_multipath_mo no_threshold property (0x1809) to 100 (0x64). am receive mode si473x-d60 devices are compatible wi th si473x-c40 devices in amrx mode. wb receive mode there are no si473x-d60 devic es which support wbrx mode. to achieve similar performance in si4704/05/3x-d60 to si4704/05/3x-b20 the -d60 devices have a more advanced feature set than -b20 devices. this section describes a step-by-step procedure to achieve similar performanc e from -d60 devices to that of -b20 devices by modifying or disabling some of the advanced features. fm receiver mode ? there is a debug feature that remains active in si4704/05/3x-d60 firm ware which can create periodic noise in audio. silicon labs recommends you disable this feature by sending the fo llowing bytes (shown here in hexadecimal form): 0x12 0x00 0xff 0x00 0x00 0x00 ? in si4704/05/3x-d60 devices, the fm_blend_rssi_stereo_threshold property is no longer at address 0x1105. use address 0x1800 instead. ? in si4704/05/3x-d60 devices, the fm_blend_rssi_mono_ threshold property is no longer at address 0x1106. use address 0x1801 instead. ? to disable the snr-based stereo blend, set bo th the fm_blend_snr_stereo_threshold property (0x1804) and the fm_blend_snr_mono _threshold property (0x1805) to 0. ? to disable the multipath-based stereo blend, se t both the fm_blend_multipath_stereo_threshold property (0x1808) and the fm_blend_multipath_mo no_threshold property (0x1809) to 100 (0x64).
an332 300 rev. 1.0 am receive mode ? set the am_mode_avc_max_gain property (0x3103) to 0x7800. ? set the am_soft_mute_threshold property (03303) to 10. ? set the am_soft_mute_slope property (0x3301) to 2 ? set the am_soft_mute_max_attenuation property (0x3302) to 16. wb receive mode there are no si473x-d60 devic es which support wbrx mode. to achieve similar performance in si4704/05/3x-c40 to si4704/05/3x-b20 this section describes a step-by-step proc edure to achieve performance from -c40 devices that is similar to that of -b20 devices. fm receiver mode si473x-c40 devices are compatible with si473x-b20 devices in fmrx mode. am receive mode ? set the am_mode_avc_max_gain property (0x3103) to 0x7800 (maximum). ? set the am_soft_mute_threshold property (0x3303) to 10 (db). ? set the am_soft_mute_slope prop erty (0x3301) to 2 (db/db). ? set the am_soft_mute_max_attenuation property (0x3302) to 16 (db). wb receive mode si473x-c40 devices are compatible with si473x-b20 devices in wbrx mode.
an332 rev. 1.0 301 d ocument c hange l ist revision 0.1 to revision 0.2 ? updated product matrix in table 1. ? added si4706 fm and high-performance rds receiver support. ? added si4707 wb/sam e receiver support. ? added si4740/41 multipath, blend, and agc properties. ? added si4749 high-performance rds receiver support. ? updated firmware, library, and component compatibility tables. ? added command timing parameters for the wb receiver. ? updated fm transmitter maximum audio volume recommendations. revision 0.2 to revision 0.3 ? added notes to am/sw/lw receiver reference clock section. ? removed si4706/07/4x?related material. ? updated product matrix in table 1. revision 0.3 to revision 0.4 ? added si4704/05/30/31/ 34/35/36/37/38/39-c40 receiver support and additional am properties. ? added si4784/85-b20 receiver support. ? updated product ma trix in table 1. ? updated with corrections to couple commands and properties. revision 0.4 to revision 0.41 ? minor edits. revision 0.41 to revision 0.5 ? combined information in an332 rev. 0.41 and an344 rev. 0.4 into an332 rev. 0.5. ? added information for si47xx-d50 and si47xx-d60 parts. revision 0.5 to revision 0.6 ? added appendix a and appendix b. revision 0.6 to revision 0.7 ? added fm_blend_max_ stereo_separation property revision 0.7 to revision 0.8 ? corrected pin numbers of lin and rin for si4704/05/3x-d60 parts. ? added more explanations to property 0x1900 and 0x3103. ? added auxin components in tables 33, 38, and 41. revision 0.8 to revision 1.0 ? removed all information about auxin components. ? removed auxin components from tables 30, 35, and 38. ? added notes to powerup command section.
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